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Re: Alchemy power managment code.

To: sshtylyov@ru.mvista.com
Subject: Re: Alchemy power managment code.
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Fri, 28 Mar 2008 23:25:27 +0900 (JST)
Cc: ralf@linux-mips.org, linux-mips@linux-mips.org, ncoesel@DEALogic.nl
In-reply-to: <47ECD828.8090600@ru.mvista.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <47E7BB4B.3080507@ru.mvista.com> <20080327223134.GA26997@linux-mips.org> <47ECD828.8090600@ru.mvista.com>
Sender: linux-mips-bounce@linux-mips.org
On Fri, 28 Mar 2008 14:36:08 +0300, Sergei Shtylyov <sshtylyov@ru.mvista.com> 
wrote:
> > Correct - and cevt-r4k won't be usable either.  I guess that means you
> > leave the user the choice between either these two or using wait.  Not
> > nice but ...
> 
>     The Alchemy code doesn't even try to use CP0 counter when CONFIG_PM=y if 
> you look into arch/mips/au1000/common/time.c... or at least it didn't before 
> Atsushi removed do_fast_pm_gettimeoffset().

Oh, yes. At that time I tried to implement clocksource drivers for
non-standard timers, but it seems I had missied Alchemy PM=y case.

The driver would be something like this?  Completely untested ;-)

static cycle_t au1000_hpt_read(void)
{
        return au_readl(SYS_TOYREAD);
}

struct clocksource au1000_clocksource = {
        .name   = "au1000-counter",
        .rating = 200,
        .read   = au1000_hpt_read,
        .mask   = CLOCKSOURCE_MASK(32),
        .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
};

void __init au1000_clocksource_init(unsinged long cpu_speed)
{
        struct clocksource *cs = &au1000_clocksource;

        clocksource_set_clock(cs, cpu_speed);
        clocksource_register(cs);
}

---
Atsushi Nemoto

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