| To: | linux-mips@linux-mips.org |
|---|---|
| Subject: | [MIPS, 2.6.16, PATCH] Re-enable sync instruction for non-R2 CPUs |
| From: | Thiemo Seufer <ths@networkno.de> |
| Date: | Mon, 25 Feb 2008 14:21:14 +0000 |
| Cc: | ralf@linux-mips.org |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.17+20080114 (2008-01-14) |
This patch re-enables the use of sync instructions for non-R2 CPUs.
It is only relevant for the linux-2.6.16-stable branch.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3995d45..b3739ed 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1585,12 +1585,12 @@ config CPU_MIPSR2_IRQ_EI
controller to allow fast dispatching from many possible interrupt
sources. Say N unless you know that external interrupt support is
required.
+endmenu
config CPU_HAS_SYNC
bool
depends on !CPU_R3000
default y
-endmenu
#
# Use the generic interrupt handling code in kernel/irq/:
|
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | [PATCH] Remove references to BCM947XX, Florian Fainelli |
|---|---|
| Next by Date: | Re: [MIPS, 2.6.16, PATCH] Re-enable sync instruction for non-R2 CPUs, Ralf Baechle |
| Previous by Thread: | [PATCH] Remove references to BCM947XX, Florian Fainelli |
| Next by Thread: | Re: [MIPS, 2.6.16, PATCH] Re-enable sync instruction for non-R2 CPUs, Ralf Baechle |
| Indexes: | [Date] [Thread] [Top] [All Lists] |