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Re: Tester with IP27/IP30 needed

To: Kumba <kumba@gentoo.org>
Subject: Re: Tester with IP27/IP30 needed
From: Ralf Baechle <ralf@linux-mips.org>
Date: Sun, 3 Feb 2008 03:16:48 +0100
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>, Florian Lohoff <flo@rfc822.org>, linux-mips@linux-mips.org, debian-mips@lists.debian.org
In-reply-to: <47A4E9DF.5070603@gentoo.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20080115112420.GA7347@alpha.franken.de> <20080115112719.GB7920@paradigm.rfc822.org> <20080117004054.GA12051@alpha.franken.de> <479609A6.2020204@gentoo.org> <20080122154958.GA29108@linux-mips.org> <479AA532.5040603@gentoo.org> <20080126143949.GA6579@alpha.franken.de> <47A4E9DF.5070603@gentoo.org>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.17 (2007-11-01)
On Sat, Feb 02, 2008 at 05:08:31PM -0500, Kumba wrote:

> 
> Thomas Bogendoerfer wrote:
>> no suprise here. As Ralf already noted cache barrier is a restricted
>> instruction, it will always cause a illegal instruction when used
>> in user space. Nevertheless it looks like all IP28 are affected
>> by the simple exploit. Flo built glibc 2.7 with LLSC war workaround
>> and this avoids triggering the hang.
>
> Ah, didn't know the 'cache' instructions was kernel-mode only.  Explains 
> why it survived then :)
>
> How does one enable the LLSC war workaround in glibc?

By modifying the code ;-)

  Ralf

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