| To: | ralf@linux-mips.org |
|---|---|
| Subject: | Re: quick question on 64-bit values with 32-bit inline assembly |
| From: | "M. Warner Losh" <imp@bsdimp.com> |
| Date: | Mon, 28 Jan 2008 14:26:10 -0700 (MST) |
| Cc: | cfriesen@nortel.com, linux-mips@linux-mips.org |
| In-reply-to: | <20080128211803.GA20434@linux-mips.org> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20080122200751.GA2672@linux-mips.org> <20080128.140245.-108809632.imp@bsdimp.com> <20080128211803.GA20434@linux-mips.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
In message: <20080128211803.GA20434@linux-mips.org> Ralf Baechle <ralf@linux-mips.org> writes: : On Mon, Jan 28, 2008 at 02:02:45PM -0700, M. Warner Losh wrote: : : > : this specific interaction of ABI and processor architecture then it was : > : probably found not to implement such a special read because it is messy : > : in more than one way. : > : > When 64-bit operations are enabled, you get all 64-bits. When they : > aren't, only the lower 32-bits of the counter are provided (with sign : > extension). So when operating in 32-bit mode, saving the upper 32 : > bits are not necessary (or even possible). : : The architecture manual doesn't make a difference between 32-bit and : 64-bit for rdhwr. My reading is the entire 64-bit would have to be : transfered. Hmmm, the manual I have specifically calls out the difference... Has cavium provided a public version? Warner |
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