| To: | "M. Warner Losh" <imp@bsdimp.com> |
|---|---|
| Subject: | Re: quick question on 64-bit values with 32-bit inline assembly |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Mon, 28 Jan 2008 21:18:03 +0000 |
| Cc: | cfriesen@nortel.com, linux-mips@linux-mips.org |
| In-reply-to: | <20080128.140245.-108809632.imp@bsdimp.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20080122175734.GA31013@linux-mips.org> <47963C31.2000403@nortel.com> <20080122200751.GA2672@linux-mips.org> <20080128.140245.-108809632.imp@bsdimp.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.17 (2007-11-01) |
On Mon, Jan 28, 2008 at 02:02:45PM -0700, M. Warner Losh wrote: > : this specific interaction of ABI and processor architecture then it was > : probably found not to implement such a special read because it is messy > : in more than one way. > > When 64-bit operations are enabled, you get all 64-bits. When they > aren't, only the lower 32-bits of the counter are provided (with sign > extension). So when operating in 32-bit mode, saving the upper 32 > bits are not necessary (or even possible). The architecture manual doesn't make a difference between 32-bit and 64-bit for rdhwr. My reading is the entire 64-bit would have to be transfered. Ralf |
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