| To: | Kumba <kumba@gentoo.org> |
|---|---|
| Subject: | Re: Tester with IP27/IP30 needed |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Tue, 22 Jan 2008 15:49:58 +0000 |
| Cc: | Thomas Bogendoerfer <tsbogend@alpha.franken.de>, Florian Lohoff <flo@rfc822.org>, linux-mips@linux-mips.org, debian-mips@lists.debian.org |
| In-reply-to: | <479609A6.2020204@gentoo.org> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20080115112420.GA7347@alpha.franken.de> <20080115112719.GB7920@paradigm.rfc822.org> <20080117004054.GA12051@alpha.franken.de> <479609A6.2020204@gentoo.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.17 (2007-11-01) |
On Tue, Jan 22, 2008 at 10:20:06AM -0500, Kumba wrote: > No effect on Octane R14000A, as far as lockups. Spikes the CPU usage in 'ps > aux', but that's about it. So far it seems R12000 and R14000 are unaffected. > If I can get my plucky IP32 R10K to boot again soon, I may try it there for > kicks and giggles. Maybe we're also seeing a side effect of the R10K's spec > exec knocking the non-cache-coherent machines out? > > Also, tried building the code with the R10K cache barrier on to see if > anything > else changes? Generally reserved for kernel stuff, but Peter once speculated > userland might have a use for it. It's a cache instruction so priviledged which means userspace can't execute it. It's also entirely unclear if a cache barrier instruction would make a difference at all. Ralf |
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | Re: Tester with IP27/IP30 needed, Kumba |
|---|---|
| Next by Date: | Re: quick question on 64-bit values with 32-bit inline assembly, Ralf Baechle |
| Previous by Thread: | Re: Tester with IP27/IP30 needed, Kumba |
| Next by Thread: | Re: Tester with IP27/IP30 needed, Kumba |
| Indexes: | [Date] [Thread] [Top] [All Lists] |