| To: | ralf@linux-mips.org |
|---|---|
| Subject: | Re: Toshiba JMR 3927 working setup? |
| From: | Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
| Date: | Tue, 08 Jan 2008 00:34:35 +0900 (JST) |
| Cc: | gregor.waltz@raritan.com, linux-mips@linux-mips.org |
| In-reply-to: | <20080107122156.GB24700@linux-mips.org> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <477EB2EA.7060009@raritan.com> <20080105.234256.25910407.anemo@mba.ocn.ne.jp> <20080107122156.GB24700@linux-mips.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Mon, 7 Jan 2008 12:21:56 +0000, Ralf Baechle <ralf@linux-mips.org> wrote: > Well, is mmiowb() needed at all on JMR3927 - or R3000 in general? Mmiowb() > is meant to deal with weak ordering which only matters to a few SMP > configurations. Well, serial_txx9 driver (mis)use mmiowb() to flush write buffer. But I was wrong. TX39H2 core _has_ SYNC instruction. So the patch I mentioned is not required for JMR3927 platform anyway. Sorry for confusion. --- Atsushi Nemoto |
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