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Re: Inter processor synchronization

To: Nilanjan Roychowdhury <Nilanjan.Roychowdhury@gnss.com>
Subject: Re: Inter processor synchronization
From: Ralf Baechle <ralf@linux-mips.org>
Date: Thu, 13 Dec 2007 12:58:47 +0000
Cc: linux-mips@linux-mips.org
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On Thu, Dec 13, 2007 at 09:07:20AM +0530, Nilanjan Roychowdhury wrote:

> I have a scenario where two images of the same Linux kernel are running
> on two MIPS cores. One is 24K and another is 4KEC. What is the best way
> to achieve inter processor synchronization between them?
> 
> I guess the locks for LL/SC are local to a particular core and can not
> be extended across a multi core system. 

4K and 24K cores don't support cache coherency.  So SMP is out of question.
This is a _total_ showstopper for SMP, don't waste your time thinking on
possible workarounds.

The you could do is some sort of clusting, running two OS images, one
on the 4K and one on the 24K which would communicate through a carefully
cache managed or even uncached shared memory region.

> Will it be easier for me if both of them becomes same core ( like both
> 24k) and I run the SMP version of Linux.


Within limits Linux supports mixing different CPU types such as R4000MC /
R4400MC and R10000 / R12000 / R14000 mixes because those processors are
similar enough

  Ralf

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