| To: | Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
|---|---|
| Subject: | Re: [PATCH] SGISEEQ: use cached memory access to make driver work on IP28 |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Tue, 27 Nov 2007 16:32:57 +0000 |
| Cc: | netdev@vger.kernel.org, linux-mips@linux-mips.org, jgarzik@pobox.com |
| In-reply-to: | <20071126223934.84BE7C2B26@solo.franken.de> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20071126223934.84BE7C2B26@solo.franken.de> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.17 (2007-11-01) |
On Sat, Nov 24, 2007 at 01:29:19PM +0100, Thomas Bogendoerfer wrote: > Following patch is clearly 2.6.25 material and is needed to get SGI IP28 > machines supported. > > Thomas. > > SGI IP28 machines would need special treatment (enable adding addtional > wait states) when accessing memory uncached. To avoid this pain I changed > the driver to use only cached access to memory. > > Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> IP28 is clearly a maximum weirdo beast. Technically the patch looks fine it's just a few stilistic issues such as there no reason for DMA_SYNC_DESC_CPU and DMA_SYNC_DESC_DEV being macros so why not using inlines. Acked-by: Ralf Baechle <ralf@linux-mips.org> Ralf |
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