linux-mips
[Top] [All Lists]

Re: futex_wake_op deadlock?

To: Kaz Kylheku <kaz@zeugmasystems.com>
Subject: Re: futex_wake_op deadlock?
From: Ralf Baechle <ralf@linux-mips.org>
Date: Tue, 20 Nov 2007 18:16:19 +0000
Cc: linux-mips@linux-mips.org
In-reply-to: <DDFD17CC94A9BD49A82147DDF7D545C54DCF9F@exchange.ZeugmaSystems.local>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20071120112051.GB30675@linux-mips.org> <DDFD17CC94A9BD49A82147DDF7D545C54DCF9F@exchange.ZeugmaSystems.local>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.17 (2007-11-01)
On Tue, Nov 20, 2007 at 10:06:44AM -0800, Kaz Kylheku wrote:

> The problem is I didn't pay enough attention because I didn't suspect it
> enough.
> 
> I was misled by the backtrace address in the soft lockup dump, which
> points to one instruction /before/ the ll instruction. So I thought that
> the lockup is somewhere outside of that loop, right?
> 
> Does the backward branch on MIPS set up the instruction pointer in such
> a way that if an interrupt goes off, it can be pointing to the previous
> instruction? I thought about that possibility.

The EPC will always point to the instruction which caused the exception
with the one special case where an instruction in a branch delay slot
was causing the exception.  If that's the case the EPC will point at the
branch and the BD bit in the cause register (bit 31) will be set to
indicate this special case.

  Ralf

<Prev in Thread] Current Thread [Next in Thread>