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First implementation is done. (software suspend on MIPS)

To: linux-mips@linux-mips.org
Subject: First implementation is done. (software suspend on MIPS)
From: "Hyon Lim" <alex@alexlab.net>
Date: Sat, 3 Nov 2007 02:26:23 +0900
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
First implementation is done.
My work includes "cpu.c, swsusp.S" which is located on
arch/mips/xxx/power. (xxx is your specific architecture)
But, problem still exist. When system resumed, kernel panic is
occured. (See below)
I think that problem is occured by missing context. (I saved only few register)
Please watch my code and please comment my mistake.

===================================================
swsusp.S
===================================================
.text

/*
 * Suspend support for MIPS.
 *
 * Distribute under GPLv2
 *
 * Copyright (c) 2007 Hyon Lim <alex@alexlab.net>
 */

#include <linux/linkage.h>
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/asm.h>
#include <asm/offset.h>
#include <asm/regdef.h>

        .text

/* this macro generates local word(unsigned long) sized variable */
#define LOCAL_WORD(x)   \
        .data           ;\
        .align 2        ;\
        .type x, @object;\
        .size x, 4      ;\
x:
        .space 4

#define WORD_ADDR(x)    \
        .align 2        ;\
.L##x:                  ;\
        .word x         

#define FUNC(x)         \
        .text           ;\
        .align 2        ;\
        .globl x        ;\
        .ent x          ;\
        .type x,@function;\
x:

#define FUNC_END(x)     \
        .end x

LOCAL_WORD(saved_context_s0);
LOCAL_WORD(saved_context_s1);
LOCAL_WORD(saved_context_s2);
LOCAL_WORD(saved_context_s3);
LOCAL_WORD(saved_context_s4);
LOCAL_WORD(saved_context_s5);
LOCAL_WORD(saved_context_s6);
LOCAL_WORD(saved_context_s7);
LOCAL_WORD(saved_context_ra);

FUNC(swsusp_arch_suspend)
        sw s0,saved_context_s0;
        sw s1,saved_context_s1;
        sw s2,saved_context_s2;
        sw s3,saved_context_s3;
        sw s4,saved_context_s4;
        sw s5,saved_context_s5;
        sw s6,saved_context_s6;
        sw s7,saved_context_s7;
        sw ra,saved_context_ra;

        jal swsusp_save;

        lw ra,saved_context_ra; // this statement corresponds to RET in x86 asm.
        //PRINT("[ASM] RETURN TO C!!");
        j ra;                           //
        
FUNC_END(swsusp_arch_suspend)

// for using printk
.rdata
.align 2
$LC0:
        .ascii "[DEBUG] RETURN TO C!!! from ASM\n\000"
        .align 2
$LC1:
        .ascii "@@#\000"
        .align 2
$LC2:
        .ascii "Copy %d!\n\000"
        .align 2
$LC3:
        .ascii "End loop\n\000"
        .align 2
$LC4:
        .ascii "[ASM] RESUME SUCCESS!!\n\000"
        .align 2
$LC5:
        .ascii "[ASM] Start copying pages ... \n\000"
        .align 2
$LC6:
        .ascii "[ASM] Load nr_copy_pages and pagedir_nosave success!!\n\000"

LOCAL_WORD(tmp_var);
LOCAL_WORD(tmp_var2);

FUNC(swsusp_arch_resume)
/*
*    This pseudo code should be implemented.
*
*    register u32 *src,*dst;
*    for (j=nr_copy_pages; j>0; j--)
*     {
*       src = pagedir_nosave[j].src;
*       dst = pagedir_nosave[j].dst;
*       for(i=0;i<1024;i++){
*               *dst++ = *src++;
*       }
*     }
*/
/*
*       typedef struct pbe{
*               unsigned long address;  // address of the copy                  
: base addr;
*               unsigned long orig_address;     //original address...           
: base addr + 4;
*       ...
*/
        // Used register lookup table
        // $t0 : orig's contents
        // $t1 :
        // $t2 : counter, 1024
        // $t3 :
        // $t4 :
        // $t5 :
        // $t6 :
        // $t7 :
        //
        // $s0 : pagedir_nosave's address
        // $s1 : nr_copy_pages's address
        // $s2 : temp_var
        // $s3 : src pointer
        // $s4 : dst pointer
        // $s5 :
        // $s6 :
        // $s7 :
        //
        
        // Get pointer from variables.
        lw s0,pagedir_nosave;           // load pagedir_nosave's address
        lw s1,nr_copy_pages;                    // $s1=nr_copy_pages;
$copy_loop:
        lw s3,0(s0);            // $s3 has source destination's address
        lw s4,4(s0);            // $s4 has orignal address
                                // Objective : copy orig_address's contents to 
address
        li t2,1024;             // $t2 = 1024;, index variable.
$copy_loop_inner:
        lw t0,0(s3);            // orig's contents into $t0
        sw t0,0(s4);            // orig's contents to target address's contents

        addiu s3,s3,4           // address++
        addiu s4,s4,4           // orig_addr++
        
        addiu t2,t2,-1          // decrease counter
        blez t2,$end_inner_loop // less than or equal zero
        j $copy_loop_inner;     // jmp!
$end_inner_loop:
        //PRINT("#");
        addiu s0,s0,16
        addiu s1,s1,-1          // nr_copy_pages = nr_copy_pages - 1;
        blez s1,$end_copy
        j $copy_loop
$end_copy:
        lw s0, saved_context_s0;
        lw s1, saved_context_s1;
        lw s2, saved_context_s2;
        lw s3, saved_context_s3;
        lw s4, saved_context_s4;
        lw s5, saved_context_s5;
        lw s6, saved_context_s6;
        lw s7, saved_context_s7;
        jal swsusp_restore;
        lw ra, saved_context_ra;
        j ra;
FUNC_END(swsusp_arch_resume)


===================================================
cpu.c
===================================================
/*
 * Suspend support for MIPS.
 *
 * Distribute under GPLv2
 *
 * Copyright (c) 2007 Hyon Lim <alex@alexlab.net>
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/spinlock.h>
#include <linux/poll.h>
#include <linux/delay.h>
#include <linux/sysrq.h>
#include <linux/proc_fs.h>
#include <linux/irq.h>
#include <linux/pm.h>
#include <linux/device.h>
#include <linux/suspend.h>
#include <asm/uaccess.h>
#include <asm/tlbflush.h>

static struct saved_context saved_context;

// This is callee-saved registers
//unsigned long saved_context_s0;
//unsigned long saved_context_s1;
//unsigned long saved_context_s2;
//unsigned long saved_context_s3;
//unsigned long saved_context_s4;
//unsigned long saved_context_s5;
//unsigned long saved_context_s6;
//unsigned long saved_context_s7;
//unsigned long saved_context_ra;       // return address

void __save_processor_state(void)
{
        preempt_disable();

        // kernel_fpu_begin();
        // mips uses PF_USEDFPU, but there isn't function of kernel_fpu_begin.
        // Think of storing fp related registers.
        
        /*                            CPU registers                        */
        /*
         * save the general registers.
         * note that gcc has constructs to specify output of certain registers,
         * but they're not used here, because it assumes that you want to modify
         * those registers, so it tries to be smart and save them beforehand.
         * It's really not necessary, and kinda fishy (check the assembly 
output),
         * so it's avoided.
         */

        /*
         * can't use output with "m" constraint. because direct addressing is
not permitted
         * on MIPS inline assembly. (register relative addressing as I see)
         * compiler usually allocates first "r" constraint register with
'v0'. (in my opinion)
         * if it doesn't, I'll describe really really massive clobber list
for stability.
         *
         * "at" register is only used by assembler.
         * "zero" register always contains zero.
         */
        asm volatile ("subu $29, 4");
        asm volatile ("sw $2, ($29)");
        
        asm volatile ("sw $3, (%0)" : : "r" (&saved_context.v[1]));
        asm volatile ("sw $4, (%0)" : : "r" (&saved_context.a[0]));
        asm volatile ("sw $5, (%0)" : : "r" (&saved_context.a[1]));
        asm volatile ("sw $6, (%0)" : : "r" (&saved_context.a[2]));
        asm volatile ("sw $7, (%0)" : : "r" (&saved_context.a[3]));
        asm volatile ("sw $8, (%0)" : : "r" (&saved_context.t[0]));
        asm volatile ("sw $9, (%0)" : : "r" (&saved_context.t[1]));
        asm volatile ("sw $10, (%0)" : : "r" (&saved_context.t[2]));
        asm volatile ("sw $11, (%0)" : : "r" (&saved_context.t[3]));
        asm volatile ("sw $12, (%0)" : : "r" (&saved_context.t[4]));
        asm volatile ("sw $13, (%0)" : : "r" (&saved_context.t[5]));
        asm volatile ("sw $14, (%0)" : : "r" (&saved_context.t[6]));
        asm volatile ("sw $15, (%0)" : : "r" (&saved_context.t[7]));
        asm volatile ("sw $16, (%0)" : : "r" (&saved_context.s[0]));
        asm volatile ("sw $17, (%0)" : : "r" (&saved_context.s[1]));
        asm volatile ("sw $18, (%0)" : : "r" (&saved_context.s[2]));
        asm volatile ("sw $19, (%0)" : : "r" (&saved_context.s[3]));
        asm volatile ("sw $20, (%0)" : : "r" (&saved_context.s[4]));
        asm volatile ("sw $21, (%0)" : : "r" (&saved_context.s[5]));
        asm volatile ("sw $22, (%0)" : : "r" (&saved_context.s[6]));
        asm volatile ("sw $23, (%0)" : : "r" (&saved_context.s[7]));
        asm volatile ("sw $24, (%0)" : : "r" (&saved_context.t[8]));
        asm volatile ("sw $25, (%0)" : : "r" (&saved_context.t[9]));
        asm volatile ("sw $26, (%0)" : : "r" (&saved_context.k[0]));
        asm volatile ("sw $27, (%0)" : : "r" (&saved_context.k[1]));
        asm volatile ("sw $28, (%0)" : : "r" (&saved_context.gp));
        asm volatile ("sw $30, (%0)" : : "r" (&saved_context.fp));
        asm volatile ("sw $31, (%0)" : : "r" (&saved_context.ra));

        asm volatile ("lw $2, ($29)");
        asm volatile ("addu $29, 4");
        
        asm volatile ("sw $2, (%0)" : : "r" (&saved_context.v[0]) : "$2");
        asm volatile ("sw $29, (%0)" : : "r" (&saved_context.sp));
        
        /*
         * special registers
         */
        asm volatile ("mfhi %0" : "=r" (saved_context.hi));
        asm volatile ("mflo %0" : "=r" (saved_context.lo));
        // load/link register??

        /*
         * coprocessor 0 registers (inclde/asm-mips/mipsregs.h)
         */
        asm volatile ("mfc0 %0, $0" : "=r" (saved_context.cp0[0]));
        asm volatile ("mfc0 %0, $1" : "=r" (saved_context.cp0[1]));
        asm volatile ("mfc0 %0, $2" : "=r" (saved_context.cp0[2]));
        asm volatile ("mfc0 %0, $3" : "=r" (saved_context.cp0[3]));
        asm volatile ("mfc0 %0, $4" : "=r" (saved_context.cp0[4]));
        asm volatile ("mfc0 %0, $5" : "=r" (saved_context.cp0[5]));
        asm volatile ("mfc0 %0, $6" : "=r" (saved_context.cp0[6]));
        asm volatile ("mfc0 %0, $7" : "=r" (saved_context.cp0[7]));
        asm volatile ("mfc0 %0, $8" : "=r" (saved_context.cp0[8]));
        asm volatile ("mfc0 %0, $9" : "=r" (saved_context.cp0[9]));
        asm volatile ("mfc0 %0, $10" : "=r" (saved_context.cp0[10]));
        asm volatile ("mfc0 %0, $11" : "=r" (saved_context.cp0[11]));
        asm volatile ("mfc0 %0, $12" : "=r" (saved_context.cp0[12]));
        asm volatile ("mfc0 %0, $13" : "=r" (saved_context.cp0[13]));
        asm volatile ("mfc0 %0, $14" : "=r" (saved_context.cp0[14]));
        asm volatile ("mfc0 %0, $15" : "=r" (saved_context.cp0[15]));
        asm volatile ("mfc0 %0, $16" : "=r" (saved_context.cp0[16]));
        asm volatile ("mfc0 %0, $17" : "=r" (saved_context.cp0[17]));
        asm volatile ("mfc0 %0, $18" : "=r" (saved_context.cp0[18]));
        asm volatile ("mfc0 %0, $19" : "=r" (saved_context.cp0[19]));
        asm volatile ("mfc0 %0, $20" : "=r" (saved_context.cp0[20]));
        asm volatile ("mfc0 %0, $21" : "=r" (saved_context.cp0[21]));
        asm volatile ("mfc0 %0, $22" : "=r" (saved_context.cp0[22]));
        asm volatile ("mfc0 %0, $23" : "=r" (saved_context.cp0[23]));
        asm volatile ("mfc0 %0, $24" : "=r" (saved_context.cp0[24]));
        asm volatile ("mfc0 %0, $25" : "=r" (saved_context.cp0[25]));
        asm volatile ("mfc0 %0, $26" : "=r" (saved_context.cp0[26]));
        asm volatile ("mfc0 %0, $27" : "=r" (saved_context.cp0[27]));
        asm volatile ("mfc0 %0, $28" : "=r" (saved_context.cp0[28]));
        asm volatile ("mfc0 %0, $29" : "=r" (saved_context.cp0[29]));
        asm volatile ("mfc0 %0, $30" : "=r" (saved_context.cp0[30]));
        asm volatile ("mfc0 %0, $31" : "=r" (saved_context.cp0[31]));
}

void save_processor_state(void)
{
                printk("[DEBUG] before __save_processor_state() 
%s,%d\n",__FILE__,__LINE__);
        __save_processor_state();
                        printk("[DEBUG] after __save_processor_state() 
%s,%d\n",__FILE__,__LINE__);
}

void __restore_processor_state(void)
{
        /*
         * first restore %ds, so we can access our data properly
         */
        asm volatile (".align 4");
//      asm volatile ("movw %0, %%ds" :: "r" ((u16)__KERNEL_DS));


        /*
         * coprocessor 0 registers (inclde/asm-mips/mipsregs.h)
         */
        asm volatile ("mtc0 %0, $0" : : "r" (saved_context.cp0[0]));
        asm volatile ("mtc0 %0, $1" : : "r" (saved_context.cp0[1]));
        asm volatile ("mtc0 %0, $2" : : "r" (saved_context.cp0[2]));
        asm volatile ("mtc0 %0, $3" : : "r" (saved_context.cp0[3]));
        asm volatile ("mtc0 %0, $4" : : "r" (saved_context.cp0[4]));
        asm volatile ("mtc0 %0, $5" : : "r" (saved_context.cp0[5]));
        asm volatile ("mtc0 %0, $6" : : "r" (saved_context.cp0[6]));
        asm volatile ("mtc0 %0, $7" : : "r" (saved_context.cp0[7]));
        asm volatile ("mtc0 %0, $8" : : "r" (saved_context.cp0[8]));
        asm volatile ("mtc0 %0, $9" : : "r" (saved_context.cp0[9]));
        asm volatile ("mtc0 %0, $10" : : "r" (saved_context.cp0[10]));
        asm volatile ("mtc0 %0, $11" : : "r" (saved_context.cp0[11]));
        asm volatile ("mtc0 %0, $12" : : "r" (saved_context.cp0[12]));
        asm volatile ("mtc0 %0, $13" : : "r" (saved_context.cp0[13]));
        asm volatile ("mtc0 %0, $14" : : "r" (saved_context.cp0[14]));
        asm volatile ("mtc0 %0, $15" : : "r" (saved_context.cp0[15]));
        asm volatile ("mtc0 %0, $16" : : "r" (saved_context.cp0[16]));
        asm volatile ("mtc0 %0, $17" : : "r" (saved_context.cp0[17]));
        asm volatile ("mtc0 %0, $18" : : "r" (saved_context.cp0[18]));
        asm volatile ("mtc0 %0, $19" : : "r" (saved_context.cp0[19]));
        asm volatile ("mtc0 %0, $20" : : "r" (saved_context.cp0[20]));
        asm volatile ("mtc0 %0, $21" : : "r" (saved_context.cp0[21]));
        asm volatile ("mtc0 %0, $22" : : "r" (saved_context.cp0[22]));
        asm volatile ("mtc0 %0, $23" : : "r" (saved_context.cp0[23]));
        asm volatile ("mtc0 %0, $24" : : "r" (saved_context.cp0[24]));
        asm volatile ("mtc0 %0, $25" : : "r" (saved_context.cp0[25]));
        asm volatile ("mtc0 %0, $26" : : "r" (saved_context.cp0[26]));
        asm volatile ("mtc0 %0, $27" : : "r" (saved_context.cp0[27]));
        asm volatile ("mtc0 %0, $28" : : "r" (saved_context.cp0[28]));
        asm volatile ("mtc0 %0, $29" : : "r" (saved_context.cp0[29]));
        asm volatile ("mtc0 %0, $30" : : "r" (saved_context.cp0[30]));
        asm volatile ("mtc0 %0, $31" : : "r" (saved_context.cp0[31]));

        /*
         * special registers
         */
        asm volatile ("mthi %0" : : "r" (saved_context.hi));
        asm volatile ("mtlo %0" : : "r" (saved_context.lo));

        /*
         * the other general registers
         *
         * note that even though gcc has constructs to specify memory
         * input into certain registers, it will try to be too smart
         * and save them at the beginning of the function.  This is esp.
         * bad since we don't have a stack set up when we enter, and we
         * want to preserve the values on exit. So, we set them manually.
         */
        asm volatile ("lw $3, (%0)" : : "r" (&saved_context.v[1]));
        asm volatile ("lw $4, (%0)" : : "r" (&saved_context.a[0]));
        asm volatile ("lw $5, (%0)" : : "r" (&saved_context.a[1]));
        asm volatile ("lw $6, (%0)" : : "r" (&saved_context.a[2]));
        asm volatile ("lw $7, (%0)" : : "r" (&saved_context.a[3]));
        asm volatile ("lw $8, (%0)" : : "r" (&saved_context.t[0]));
        asm volatile ("lw $9, (%0)" : : "r" (&saved_context.t[1]));
        asm volatile ("lw $10, (%0)" : : "r" (&saved_context.t[2]));
        asm volatile ("lw $11, (%0)" : : "r" (&saved_context.t[3]));
        asm volatile ("lw $12, (%0)" : : "r" (&saved_context.t[4]));
        asm volatile ("lw $13, (%0)" : : "r" (&saved_context.t[5]));
        asm volatile ("lw $14, (%0)" : : "r" (&saved_context.t[6]));
        asm volatile ("lw $15, (%0)" : : "r" (&saved_context.t[7]));
        asm volatile ("lw $16, (%0)" : : "r" (&saved_context.s[0]));
        asm volatile ("lw $17, (%0)" : : "r" (&saved_context.s[1]));
        asm volatile ("lw $18, (%0)" : : "r" (&saved_context.s[2]));
        asm volatile ("lw $19, (%0)" : : "r" (&saved_context.s[3]));
        asm volatile ("lw $20, (%0)" : : "r" (&saved_context.s[4]));
        asm volatile ("lw $21, (%0)" : : "r" (&saved_context.s[5]));
        asm volatile ("lw $22, (%0)" : : "r" (&saved_context.s[6]));
        asm volatile ("lw $23, (%0)" : : "r" (&saved_context.s[7]));
        asm volatile ("lw $24, (%0)" : : "r" (&saved_context.t[8]));
        asm volatile ("lw $25, (%0)" : : "r" (&saved_context.t[9]));
        asm volatile ("lw $26, (%0)" : : "r" (&saved_context.k[0]));
        asm volatile ("lw $27, (%0)" : : "r" (&saved_context.k[1]));
        asm volatile ("lw $28, (%0)" : : "r" (&saved_context.gp));
        asm volatile ("lw $29, (%0)" : : "r" (&saved_context.sp));
        asm volatile ("lw $30, (%0)" : : "r" (&saved_context.fp));
        asm volatile ("lw $31, (%0)" : : "r" (&saved_context.ra));
        // Good job 'v0'. It's your turn!
        asm volatile ("lw $2, (%0)" : : "r" (&saved_context.v[0]));

        preempt_enable();
}

void restore_processor_state(void)
{
                        printk("[DEBUG] before __restore_processor_state()
%s,%d\n",__FILE__,__LINE__);
        __restore_processor_state();
                                printk("[DEBUG] after 
__restore_processor_state()
%s,%d\n",__FILE__,__LINE__);
}

/* Needed by apm.c */
EXPORT_SYMBOL(save_processor_state);
EXPORT_SYMBOL(restore_processor_state);


==============================================
Kernel Panic Message
==============================================
kswapd0 left refrigerator, kernel/power/process.c,67
init left refrigerator, kernel/power/process.c,67
CPU 0 Unable to handle kernel paging request at virtual address
fffff689, epc ==  801e258c, ra == 801e2c44
Oops in arch/mips/mm/fault.c::do_page_fault, line 204[#1]:
Cpu 0
$ 0   : 00000000 1000f800 fffff689 80364418
$ 4   : 80364018 00000400 fffff689 8038ff34
$ 8   : 00004642 802f3e28 80370000 80370000
$12   : 80370000 fffffffa ffffffff 0000000a
$16   : 80364018 80364417 1000f801 8038ff34
$20   : 00000000 802f0000 80364018 00000400
$24   : 00000001 8038fd22
$28   : 8038e000 8038fe80 8014a438 801e2c44
Hi    : 00000083
Lo    : e42b2000
epc   : 801e258c vsnprintf+0x58/0x6fc     Tainted: P
ra    : 801e2c44 vscnprintf+0x14/0x30
Status: 1000f802    KERNEL EXL
Cause : 00800008
BadVA : fffff689
PrId  : 00018448
Modules linked in: rfs atyx220 atifplib
Process init (pid: 1, threadinfo=8038e000, task=80388b90)
Stack 1: 8031e920 0000305f 000030b0 802f0000 802f0000 802f3e28 80370000 80370000
        00000400 802f0000 1000f801 8014a438 00000000 802f0000 802e0000 8014a438
        801e2c44 000030b0 80126a24 80126b5c fffff689 8014a438 80360000 80126d00
        80364069 802f0000 1000f800 802f3e28 00000051 802f0000 00000001 802f0000
        8014a438 8014a438 00000000 80126edc 80126f78 8014a438 00000000 80126edc
        802e0000 8014a438 8014a440 8014a438 8014a438 802f0000 00000001 00000000
        8014a438 8014a438 8014a438 8014a438 8025305c 00000000 ffffffff 802df120
        000000fc 8037a4c8 8014a438 8014a45c 8038ae40 802f0000 00000001 00000000
        00000003 0a737974 7fff7c70 00000003 00410000 00000000 7fff7f14 00000001
        00000001 00443f10 00000000 00492c80 00000000 00000000 1000e7a0 7fff7ba8
        00443fd0 0040baf8 0000f813 00000000 00000000 1000e6f0 10800020 0047038c
        55555555 55555555 55555555 55555555 55555555 55555555 55555555 55555555
Stack 2: fffff689 8038ff34 00004642 802f3e28 80370000 80370000 80370000 fffffffa
        ffffffff 0000000a 80364018 80364417 1000f801 8038ff34 00000000 802f0000
        80364018 00000400 00000001 8038fd22 801063dc 8010d6f4 8038e000 8038fe80
        8014a438 801e2c44 1000f802 e42b2000 00000083 fffff689 00800008 801e258c
        ...
Call Trace:
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<801e2c44>] vscnprintf+0x14/0x30
 [<80126a24>] release_console_sem+0xec/0x364
 [<80126b5c>] release_console_sem+0x224/0x364
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<80126d00>] vprintk+0x64/0x2c0
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<80126edc>] vprintk+0x240/0x2c0
 [<80126f78>] printk+0x1c/0x28
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<80126edc>] vprintk+0x240/0x2c0
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<8014a440>] swsusp_suspend+0x80/0xc0
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<8025305c>] restore_processor_state+0x24/0x5c
 [<8014a438>] swsusp_suspend+0x78/0xc0
 [<8014a45c>] swsusp_suspend+0x9c/0xc0



Code:
        18400009  25adffff  24040020  020c102b  01a01821  14400002
25adffff  a1840000
        1c60fffa  258c0001  01801821  8fb70064  8fb60060  8fb5005c
8fb40058  8fb30054
        8fb20050  8fb1004c  8fb00048  00601021  03e00008  27bd0068
04e00041  00111082
        30420001  14400033  001110c2  30420001  1040ff90  00119142
25adffff  08078890
        24150020  0807892c  00c71025  00071002  00402021  10400004
25ce0001  004f001b
        00002012  00001010  00804021  00c03821  00402021  0000b021
0000b821  10000006
        24050021  00040840  0004bfc2  00232025  00073840  0016b040
16e00002  008f182b
        14600003  24a5ffff  008f2023  26d60001  14a0fff4  00071fc2
00942021  90850000
        00081800  00001021  00005821  00564025  006b4825  01003021
01203821  01091025
        a3250000  1440ffd9  01ddc821  0807889f  030e102a  25adffff
0807888f  2415002b
        020c102b  14400002  24020030  a1820000  080788bd  258c0001
08078898  25adfffe
        00063023  00073823  0006102b  00e23823  25adffff  0807888f
2415002d  10400008
        24020030  258c0001  020c102b  1440fff0  00000000  92820021
08078937  a1820000
        08078944  a1820000  27bdffb8  afb7003c  afb60038  afb3002c
afbf0040  afb50034
        afb40030  afb20028  afb10024  afb00020  00a0b821  0080b021
afa60050  04a000c7
        00e09821  00851821  2471ffff  2482ffff  0222102b  14400023
00808021  00c01021
       <90440000> 10800010  00403021  00041e00  00031e03  24020025
1062001d  0230102b
        14400004  24c20001  a2040000  8fa60050  24c20001  26100001
afa20050  90440000
        1480fff2  00403021  0230102b  1440001e  02161023  a2000000
8fbf0040  8fb7003c
        8fb60038  8fb50034  8fb40030  8fb3002c  8fb20028  8fb10024
8fb00020  03e00008
        27bd0048  2411ffff  08078962  0004b823  00009021  24c60001
afa60050  80c20000
        2442ffe0  2c430011  1060000b  3c03802d  00021080  24638d8c
00431021  8c440000
        00800008  00000000  12e0ffe3  00000000  08078979  a2200000
90c50000  3c148032
        2682d560  30a300ff  00621821  90640000  00042082  30840001
14800049  2415ffff
        00051e00  00031e03  2402002a  1062006c  26620003  80c30000
2402002e  10620048
        2408ffff  80c40000  38830068  3882006c  2c630001  2c420001
00621825  14600025
        2405ffff  2402004c  10820022  2402005a  10820020  2402007a
1082001e  00000000
        80c30000  2463ffdb  2c620054  14400025  2409000a  0230102b
14400003  24020025
        a2020000  8fa60050  90c30000  1060003d  26100001  0230102b
1440ffa6  24c20001
        a2030000  0807896f  8fa60050  08078988  36520001  08078988
36520010  08078988
        36520004  08078988  36520020  08078988  36520008  80c50000
2402006c  24c60001
        14a2ffdf  afa60050  80c20000  1445ffdc  00000000  24c60001
2405004c  080789bb

Kernel panic - not syncing: Attempted to kill init!

-- 
Hyon Lim (임현)
Mobile. 010-8212-1240 (Intl' Call : +82-10-8212-1240)
Fax. 032-232-0578 (Intl' Available)
Homepage : http://www.alexlab.net
Blog : http://www.alexlab.net/blog
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