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Re: [PATCH] Use a sensible tlbex default for unknown CPUs

To: Thiemo Seufer <ths@networkno.de>
Subject: Re: [PATCH] Use a sensible tlbex default for unknown CPUs
From: Ralf Baechle <ralf@linux-mips.org>
Date: Sun, 28 Oct 2007 23:39:41 +0000
Cc: "Maciej W. Rozycki" <macro@linux-mips.org>, linux-mips@linux-mips.org
In-reply-to: <20071025205654.GF3994@networkno.de>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20071025155912.GD3994@networkno.de> <Pine.LNX.4.64N.0710251707170.24086@blysk.ds.pg.gda.pl> <20071025205654.GF3994@networkno.de>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.14 (2007-02-12)
On Thu, Oct 25, 2007 at 09:56:54PM +0100, Thiemo Seufer wrote:

> > > currently the kernel panics when it boots on an unknown CPU model
> > > (with an unknown PRID). Based on the assumption that the majority
> > > of newly supported CPU will conform to Release 2 standard, I wrote
> > > the appended patch which handles unknown CPUs as R2. It isn't
> > > completely bulletproof, as (yet unsupported) non-R1/R2 CPUs may
> > > use the AT config bits for different purposes. I still think this
> > > is good enough a test.
> > 
> >  Good idea in general, but do we have to rely on the undefined?  How 
> > about this:
> > 
> > > +         /* Panic if this isn't a Release 2 CPU. */
> > > +         if (!((read_c0_config() & MIPS_CONF_AT) >> 13)) {
> > 
> >     if (!(current_cpu_data.isa_level &
> >           (MIPS_CPU_ISA_M64R2 | MIPS_CPU_ISA_M32R2))) {
> > 
> > instead for example?
> 
> This is circular, as isa_level won't be initialized for a unknown CPU.
> The *_r2 check suggested by Ralf has the same problem AFAICS, so it
> looks like we have to stick with the original solution.

The ISA level is determined earlier by another probe.  If it cannot be
determined the kernel will already have paniced so the cleaner variant is
ok.

  Ralf

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