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Re: [PATCH] Use a sensible tlbex default for unknown CPUs

To: "Maciej W. Rozycki" <macro@linux-mips.org>
Subject: Re: [PATCH] Use a sensible tlbex default for unknown CPUs
From: Thiemo Seufer <ths@networkno.de>
Date: Thu, 25 Oct 2007 21:56:54 +0100
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
In-reply-to: <Pine.LNX.4.64N.0710251707170.24086@blysk.ds.pg.gda.pl>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20071025155912.GD3994@networkno.de> <Pine.LNX.4.64N.0710251707170.24086@blysk.ds.pg.gda.pl>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.16 (2007-06-11)
Maciej W. Rozycki wrote:
> On Thu, 25 Oct 2007, Thiemo Seufer wrote:
> 
> > currently the kernel panics when it boots on an unknown CPU model
> > (with an unknown PRID). Based on the assumption that the majority
> > of newly supported CPU will conform to Release 2 standard, I wrote
> > the appended patch which handles unknown CPUs as R2. It isn't
> > completely bulletproof, as (yet unsupported) non-R1/R2 CPUs may
> > use the AT config bits for different purposes. I still think this
> > is good enough a test.
> 
>  Good idea in general, but do we have to rely on the undefined?  How 
> about this:
> 
> > +           /* Panic if this isn't a Release 2 CPU. */
> > +           if (!((read_c0_config() & MIPS_CONF_AT) >> 13)) {
> 
>       if (!(current_cpu_data.isa_level &
>             (MIPS_CPU_ISA_M64R2 | MIPS_CPU_ISA_M32R2))) {
> 
> instead for example?

This is circular, as isa_level won't be initialized for a unknown CPU.
The *_r2 check suggested by Ralf has the same problem AFAICS, so it
looks like we have to stick with the original solution.


Thiemo

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