linux-mips
[Top] [All Lists]

Re: [PATCH] serial: fix au1xxx UART0 irq setup

To: "Maciej W. Rozycki" <macro@linux-mips.org>
Subject: Re: [PATCH] serial: fix au1xxx UART0 irq setup
From: Ralf Baechle <ralf@linux-mips.org>
Date: Thu, 25 Oct 2007 17:41:03 +0100
Cc: Jan Nikitenko <jan.nikitenko@gmail.com>, linux-mips@linux-mips.org, linux-serial@vger.kernel.org
In-reply-to: <Pine.LNX.4.64N.0710251548080.24086@blysk.ds.pg.gda.pl>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <4720A11E.5060101@gmail.com> <20071025140940.GC23398@linux-mips.org> <Pine.LNX.4.64N.0710251548080.24086@blysk.ds.pg.gda.pl>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.14 (2007-02-12)
On Thu, Oct 25, 2007 at 03:57:01PM +0100, Maciej W. Rozycki wrote:

> > That said, irq 0 is imho totally valid (take the good old PIT timer
> > interrupt of the PC as the classic example) and treating it as an invalid 
> > interrupt number is broken.
> 
>  I would rather -1 stood for the invalid IRQ number -- unlike with 0 
> chances are nobody will need 4G of interrupt lines or vectors (as 
> applicable) in a single system.  We sort of escape the problem with the 
> MIPS processors because the IP0 bit of the Cause register is a software 
> interrupt that is not used by devices, but still some platforms bypass the 
> built-in interrupt "controller" as only a single source is used in the 
> Cause register and want to start the numbering of lines in the external 
> controller from 0.

Time to convert those platforms to irq_cpu.c as well.

Anyway, I recall there was an argument against using -1 as the invalid
irq number - but since -1 is not a valid index into the irq_desc array
for example I would consider such use broken.  But does anybody recall
the details?

  Ralf

<Prev in Thread] Current Thread [Next in Thread>