On Mon, 22 Oct 2007 22:04:00 +0100, Ralf Baechle <ralf@linux-mips.org> wrote:
> > Use delta value based on its speed for faster probing.
>
> Still the same issue, it breaks with Qemu. You probably don't see this
> if you're testing on a desktop where the TSC is used for timing but on
> a laptop it breaks big time. I need to increase the shift value to at
> least like 15 to get it to work more or less reliably with Qemu, so a
> somewhat different approach is needed.
OK, Here is the different approach.
---
Subject: [PATCH] Make c0_compare_int_usable faster (take 2)
Try to increase delta value step by step until we can make sure the
counter is not expired.
arch/mips/kernel/cevt-r4k.c | 14 ++++++++++----
1 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 47c8c0e..fa3b9b2 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -179,7 +179,7 @@ static int c0_compare_int_pending(void)
static int c0_compare_int_usable(void)
{
- const unsigned int delta = 0x300000;
+ unsigned int delta;
unsigned int cnt;
/*
@@ -192,9 +192,15 @@ static int c0_compare_int_usable(void)
return 0;
}
- cnt = read_c0_count();
- cnt += delta;
- write_c0_compare(cnt);
+ for (delta = 0x10; delta <= 0x400000; delta <<= 1) {
+ cnt = read_c0_count();
+ cnt += delta;
+ write_c0_compare(cnt);
+ irq_disable_hazard();
+ if ((int)(read_c0_count() - cnt) < 0)
+ break;
+ /* increase delta if the timer was already expired */
+ }
while ((int)(read_c0_count() - cnt) <= 0)
; /* Wait for expiry */
|