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Re: [PATCH][MIPS] add GT641xx timer0 clockevent

To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Subject: Re: [PATCH][MIPS] add GT641xx timer0 clockevent
From: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Date: Tue, 23 Oct 2007 11:15:58 +0900
Cc: yoichi_yuasa@tripeaks.co.jp, ralf@linux-mips.org, linux-mips@linux-mips.org
In-reply-to: <20071023.100645.74754145.nemoto@toshiba-tops.co.jp>
Organization: TriPeaks Corporation
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20071022194315.f75738ba.yoichi_yuasa@tripeaks.co.jp> <20071022.234755.45745247.anemo@mba.ocn.ne.jp> <200710230054.l9N0sVv7031267@po-mbox301.hop.2iij.net> <20071023.100645.74754145.nemoto@toshiba-tops.co.jp>
Sender: linux-mips-bounce@linux-mips.org
On Tue, 23 Oct 2007 10:06:45 +0900 (JST)
Atsushi Nemoto <anemo@mba.ocn.ne.jp> wrote:

> On Tue, 23 Oct 2007 09:55:55 +0900, Yoichi Yuasa 
> <yoichi_yuasa@tripeaks.co.jp> wrote:
> > > These clockevent routines are always called with interrupt disabled,
> > > so I suppose those spin_lock_irqsave/spin_unlock_irqrestore pairs can
> > > be omitted. (or this timer can be used on SMP?)
> > 
> > Yes, it can be used on Malta(SMP).
> 
> Then spin_lock()/spin_unlock() is enough, isn't it?

The timer control register(GT_TC_CONTROL_OFS) is shared with 4 timers.
The 4 timers are connected with separate IRQ. 

clockevents_program_event() and clockevents_set_mode() can be called from
anywhere(in the kernel).

I think that it's necessary for it.

Yoichi

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