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[PATCH 3/4] tlbex.c: use __cacheline_aligned instead of __tlb_handler_al

To: ralf@linux-mips.org
Subject: [PATCH 3/4] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align attribute
From: Franck Bui-Huu <fbuihuu@gmail.com>
Date: Thu, 18 Oct 2007 09:11:16 +0200
Cc: anemo@mba.ocn.ne.jp, ths@networkno.de, linux-mips@linux-mips.org
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References: <1192691477-4675-1-git-send-email-fbuihuu@gmail.com>
Sender: linux-mips-bounce@linux-mips.org
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
---
 arch/mips/mm/tlbex.c |    9 +++------
 1 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index aa14343..b6ef4b0 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -1372,18 +1372,15 @@ static void __init build_r4000_tlb_refill_handler(void)
 extern void tlb_do_page_fault_0(void);
 extern void tlb_do_page_fault_1(void);
 
-#define __tlb_handler_align \
-       __attribute__((__aligned__(1 << CONFIG_MIPS_L1_CACHE_SHIFT)))
-
 /*
  * 128 instructions for the fastpath handler is generous and should
  * never be exceeded.
  */
 #define FASTPATH_SIZE 128
 
-u32 __tlb_handler_align handle_tlbl[FASTPATH_SIZE];
-u32 __tlb_handler_align handle_tlbs[FASTPATH_SIZE];
-u32 __tlb_handler_align handle_tlbm[FASTPATH_SIZE];
+u32 handle_tlbl[FASTPATH_SIZE] __cacheline_aligned;
+u32 handle_tlbs[FASTPATH_SIZE] __cacheline_aligned;
+u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned;
 
 static void __init
 iPTE_LW(u32 **p, struct label **l, unsigned int pte, unsigned int ptr)
-- 
1.5.3.4


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