| To: | "Maciej W. Rozycki" <macro@linux-mips.org> |
|---|---|
| Subject: | Re: [MIPS] Probe for usability of cp0 compare interrupt. |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Wed, 17 Oct 2007 18:23:45 +0100 |
| Cc: | Atsushi Nemoto <anemo@mba.ocn.ne.jp>, linux-mips@linux-mips.org |
| In-reply-to: | <Pine.LNX.4.64N.0710171756450.28993@blysk.ds.pg.gda.pl> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <S20022491AbXJQLKE/20071017111004Z+82239@ftp.linux-mips.org> <20071018.011033.115643462.anemo@mba.ocn.ne.jp> <20071017164636.GC5491@linux-mips.org> <Pine.LNX.4.64N.0710171756450.28993@blysk.ds.pg.gda.pl> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.14 (2007-02-12) |
On Wed, Oct 17, 2007 at 06:03:35PM +0100, Maciej W. Rozycki wrote: > > The two things are a know lose end. There is a bug in some old MIPS > > processors where reading one of the compare or count registers in exactly > > the moment when both have identical values in the interrupt getting lost. > > > > Will have to dig up the details on that one again before I can implement > > a proper workaround ... > > This is the erratum #53 of the R4000PC/SC processor and it triggers if > the Count register is read. Conveniently, in the errata sheet as > distributed, the text is covered by a figure (Figure 1a on page 13), so > you can only reach the page with some PostScript magic. I did it a while > ago and now have a separate document available which provides the text of > page 13 with the figure removed. I can provide it if there is interest. Ah. I noticed there was something like white writing on white background matching when I searched the PDF for keywords. So I guess it would be nice if somebody could regenerate a PS or PDF file. I also seem to be missing information on the later R4400 versions. Ralf |
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | [PATCH] IP22 fix hang due to messing with timer interrupt handler, Thomas Bogendoerfer |
|---|---|
| Next by Date: | Re: [PATCH] IP22 fix hang due to messing with timer interrupt handler, Ralf Baechle |
| Previous by Thread: | Re: [MIPS] Probe for usability of cp0 compare interrupt., Maciej W. Rozycki |
| Next by Thread: | Re: [MIPS] Probe for usability of cp0 compare interrupt., Maciej W. Rozycki |
| Indexes: | [Date] [Thread] [Top] [All Lists] |