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Re: plat_timer_setup, mips_timer_ack, etc.

To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Subject: Re: plat_timer_setup, mips_timer_ack, etc.
From: Ralf Baechle <ralf@linux-mips.org>
Date: Tue, 16 Oct 2007 17:36:10 +0100
Cc: linux-mips@linux-mips.org
In-reply-to: <20071017.005211.108739735.anemo@mba.ocn.ne.jp>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20071017.005211.108739735.anemo@mba.ocn.ne.jp>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.14 (2007-02-12)
On Wed, Oct 17, 2007 at 12:52:11AM +0900, Atsushi Nemoto wrote:

> With recent clockevent conversion, for typical r4k counter timer,
> setup_irq() for the timer interrupt is called three times.
> 
> 1. from time_init()  (#ifdef CONFIG_IRQ_CPU block)
> 2. from plat_timer_setup()  (arch/tx4927/common/tx4927_setup.c, for example)
> 3. from mips_clockevent_init()
> 
> Which one should remain?

I would suggest the one near where the clockevent device is registered.

> Also I found mips_timer_ack and cycles_per_jiffy are not used now.
> Can we remove them entirely?

I think so.  Each clockevent device should rather try to be independent
of others.  What made the old timer code such a mess is that it was
desparately trying to share resources giving everybody plenty of rope ...


> Furthermore, I wonder how to disable mips_clockevent_device even if
> the CPU has r4k counter.  For example, pnx8550 has the r4k counter but
> needs special mips_timer_ack and clocksource_mips.read routine.  I
> suppose current time code is broken for such platforms.

PNX and the old revisions of the R4000 which have a bug where the
compare interrupt can be lost if the counter is read just when it has
the same value as the compare register.

  Ralf

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