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Re: [PATCH] enable PCI bridges in MIPS ip32

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH] enable PCI bridges in MIPS ip32
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Fri, 5 Oct 2007 13:27:26 +0100 (BST)
Cc: Giuseppe Sacco <giuseppe@eppesuigoccas.homedns.org>, linux-mips@linux-mips.org
In-reply-to: <Pine.LNX.4.64N.0710041459270.10573@blysk.ds.pg.gda.pl>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <E1IdO0a-0000n7-Cg@eppesuigoccas.homedns.org> <Pine.LNX.4.64N.0710041316000.10573@blysk.ds.pg.gda.pl> <20071004130318.GC28928@linux-mips.org> <Pine.LNX.4.64N.0710041459270.10573@blysk.ds.pg.gda.pl>
Sender: linux-mips-bounce@linux-mips.org
On Thu, 4 Oct 2007, Maciej W. Rozycki wrote:

> to be careful about the device #31 in general; it is seldom used anyway as 
> there are only 20 IDSEL lines defined by the standard and they are usually 
> mapped starting from the device #0.

 Just to correct myself not to confuse anybody -- there are actually 21 
IDSEL lines which map from bits 31:11 of the address provided for Type 0 
configuration access cycles -- at most one bit from that range is ever set 
for such cycles.  The issuing bridge is free to set no bits for device 
numbers it has no assigned IDSEL line for; such transactions will never be 
claimed by any device and thus will always terminate with Master-Abort.

  Maciej

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