| To: | Franck Bui-Huu <vagabon.xyz@gmail.com> |
|---|---|
| Subject: | Re: [PATCH] mm/pg-r4k.c: Dump the generated code |
| From: | "Maciej W. Rozycki" <macro@linux-mips.org> |
| Date: | Fri, 5 Oct 2007 13:19:17 +0100 (BST) |
| Cc: | Ralf Baechle <ralf@linux-mips.org>, Thiemo Seufer <ths@networkno.de>, linux-mips@linux-mips.org |
| In-reply-to: | <4705EFE5.7090704@gmail.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <Pine.LNX.4.64N.0710021447470.32726@blysk.ds.pg.gda.pl> <20071002141125.GC16772@networkno.de> <20071002154918.GA11312@linux-mips.org> <47038874.9050704@gmail.com> <20071003131158.GL16772@networkno.de> <4703F155.4000301@gmail.com> <20071003201800.GP16772@networkno.de> <47049734.6050802@gmail.com> <20071004121557.GA28928@linux-mips.org> <4705004C.5000705@gmail.com> <Pine.LNX.4.64N.0710041616570.10573@blysk.ds.pg.gda.pl> <4705EFE5.7090704@gmail.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Fri, 5 Oct 2007, Franck Bui-Huu wrote: > Just to be sure I haven't missed anything, it seems that we _could_ generate > the whole tlb handler at compile time since the CPU type is known at that > time, no need to have any fixups at runtime, isn't it ? The exact CPU type is not known at the moment. For example CPU_R4X00 and CPU_MIPS32_R1 cover whole ranges that have subtle differences. It may be possible to provide all the variations as a selection to the user, but it may be unfeasible -- I don't know. Compare what we have in arch/mips/Kconfig with <asm/cpu.h>. Maciej |
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