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Re: [Qemu-devel] QEMU/MIPS & dyntick kernel

To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] QEMU/MIPS & dyntick kernel
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Tue, 02 Oct 2007 22:37:35 +0200
Cc: linux-mips@linux-mips.org
In-reply-to: <4702A99B.7020008@qumranet.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20071002200644.GA19140@hall.aurel32.net> <4702A99B.7020008@qumranet.com>
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Avi Kivity a écrit :
> Aurelien Jarno wrote:
>> Hi,
>>
>> As announced by Ralf Baechle, dyntick is now available on MIPS. I gave a
>> try on QEMU/MIPS, and unfortunately it doesn't work correctly.
>>
>> In some cases the kernel schedules an event very near in the future, 
>> which means the timer is scheduled a few cycles only from its current
>> value. Unfortunately under QEMU, the timer runs too fast compared to the
>> speed at which instructions are execution.
> 
> Sounds like a kernel bug.  Can't there conceivably exist real hardware 
> (or a real timeout) that exhibits the same timing?
> 
> Especially today with variable clock frequencies, I don't see how the 
> kernel can rely on exact timing.
> 

Well on real hardware, the instruction rate and the timer are linked:
the timer run at half the speed of the CPU. As the corresponding
assembly code is very small, only uses registers and is run in kernel
mode, you know for sure that 48 cycles is more than enough.

-- 
  .''`.  Aurelien Jarno             | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

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