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Re: [PATCH 2/3] Au1000 : fix PCI controller registration

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH 2/3] Au1000 : fix PCI controller registration
From: Florian Fainelli <florian.fainelli@telecomint.eu>
Date: Tue, 25 Sep 2007 19:17:10 +0200
Cc: linux-mips@linux-mips.org, blogic@openwrt.org, nbd@openwrt.org
In-reply-to: <20070925171119.GA11350@linux-mips.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <200709251707.29067.florian.fainelli@telecomint.eu> <20070925171119.GA11350@linux-mips.org>
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Le mardi 25 septembre 2007, Ralf Baechle a écrit :
> On Tue, Sep 25, 2007 at 05:07:28PM +0200, Florian Fainelli wrote:
> > diff --git a/include/asm-mips/mach-au1x00/au1000.h
> > b/include/asm-mips/mach-au1x00/au1000.h index 58fca8a..046920a 100644
> > --- a/include/asm-mips/mach-au1x00/au1000.h
> > +++ b/include/asm-mips/mach-au1x00/au1000.h
> > @@ -1680,9 +1680,9 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
> >  #define PCI_LAST_DEVFN  (19<<3)
> >
> >  #define IOPORT_RESOURCE_START 0x00001000 /* skip legacy probing */
> > -#define IOPORT_RESOURCE_END   0xffffffff
> > +#define IOPORT_RESOURCE_END   0xfffffffffULL
>
> So you're saying that PCI has just under 64GB worth of ioport address space
> on Alchemy?  That's not how I recall my PCI spec ...

Errm, no, actually, Alchemy has a 36bits PCI adressing mode if I recall right.

>
>   Ralf



-- 
Cordialement, Florian Fainelli
------------------------------

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