Re: branch delay slot

[Ralf Baechle <ralf@linux-mips.org>]

On Fri, Sep 21, 2007 at 09:01:15AM -0700, Winson Yung wrote:

> Hi there, in the following mips 32bit atomic cmp_xchg api, I was
> wondering why there is no nop after the two branch instructions. Does
> this introduce a bug, or is it a "feature" in the code to use the
> delay slot for an instructino to execut something whether or not they
> take the branch.
> 
> #define __arch_compare_and_exchange_xxx_32_int(mem, newval, oldval, rel, acq) 
> \

Manual filling of the delay slot is only required when the assembler is
in .set noreorder mode.  Otherwise - and that's the default mode - it will
try do something sensible with the delay slot itself.

  Ralf