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Re: MIPS assembly question

To: Winson Yung <winson.yung@gmail.com>
Subject: Re: MIPS assembly question
From: David Daney <ddaney@avtrex.com>
Date: Thu, 20 Sep 2007 16:44:28 -0700
Cc: linux-mips@linux-mips.org
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Winson Yung wrote:
Hi there, I have some general mips inline assembly question regards to
32 bit atomic operation, here a section of its assembly
implementation:

                "       .set    mips3                                   \n"
                "1:     ll      %0, %2                  # __cmpxchg_u32 \n"
                "       bne     %0, %z3, 2f                             \n"
                "       .set    mips0                                   \n"
                "       move    $1, %z4                                 \n"
                "       .set    mips3                                   \n"
                "       sc      $1, %1                                  \n"
                "       beqzl   $1, 1b                                  \n"

Questions:

1) what does 'z' mean in the line of 'bne %0, %z3, 2f'?

I think this 'z' comes from print_operand() in gcc/config/mips/mips.c in GCC:

   'z'  if the operand is 0, use $0 instead of normal operand.

This is an optimization so that if you are comparing against the value of zero, you can use $0 instead of loading up another register with the value of zero first.

2) Is $1 suppose to be use as an constant 1, I don't understand the
line 'sc  $1, %1'

$1 is register 1.  AKA $at.

So that line is Store Conditional Word from register 1 into the memory location indicated by operand 1.


Will appreciate if someone can point out to me a good tutorial on
explaining these little things.


If it is not in the GCC documentation, then you have to look at the GCC source code. I don't know of any better way.

David Daney

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