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Re: MIPS atomic memory operations (A.K.A PR 33479).

To: David Daney <ddaney@avtrex.com>
Subject: Re: MIPS atomic memory operations (A.K.A PR 33479).
From: David Daney <ddaney@avtrex.com>
Date: Wed, 19 Sep 2007 10:47:42 -0700
Cc: "Maciej W. Rozycki" <macro@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>, Richard Sandiford <rsandifo@nildram.co.uk>, GCC Mailing List <gcc@gcc.gnu.org>, linux-mips@linux-mips.org
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David Daney wrote:
Maciej W. Rozycki wrote:
On Wed, 19 Sep 2007, Ralf Baechle wrote:

Please make this loop closure branch a branch-likely.  This is necessary
as a errata workaround for some processors.

Do we emulate them for MIPS I? We do emulate "ll" and "sc" and adding "sync" is easy

Currently, I (and thus GCC 4.3) am assuming that Linux emulates 'll', 'sc' and 'sync', If sync is not emulated, we would need to adjust the code generation so that it is not emitted on ISAs that don't support it.


I just checked myself. 'sync' is not emulated. We will have to make a change so that it is not emitted on ISAs that do not support it.

David Daney

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