| To: | Ralf Baechle <ralf@linux-mips.org> |
|---|---|
| Subject: | Re: MIPS atomic memory operations (A.K.A PR 33479). |
| From: | "Maciej W. Rozycki" <macro@linux-mips.org> |
| Date: | Wed, 19 Sep 2007 18:07:56 +0100 (BST) |
| Cc: | David Daney <ddaney@avtrex.com>, Richard Sandiford <rsandifo@nildram.co.uk>, GCC Mailing List <gcc@gcc.gnu.org>, linux-mips@linux-mips.org |
| In-reply-to: | <20070919165809.GA14767@linux-mips.org> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <46F06980.4080500@avtrex.com> <20070919165809.GA14767@linux-mips.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Wed, 19 Sep 2007, Ralf Baechle wrote: > Please make this loop closure branch a branch-likely. This is necessary > as a errata workaround for some processors. Do we emulate them for MIPS I? We do emulate "ll" and "sc" and adding "sync" is easy (as a no-op as support for R3000 SMP is unlikely to ever happen). Adding branches-likely, hmm... Even though we do have logic to do that as a part of the FP emulator. A workaround for a CPU erratum fits within the "-mfix-*" option family quite well though. Maciej |
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