Re: does the SAVE_ALL nesting in kernel?

["Dajie Tan" <jiankemeng@gmail.com>]

You can see this document for more details:

http://www.xtrj.org/mips/default.htm

or the document for analysing the process of exception and interrupt
of mips linux:

http://people.openrays.org/~comcat/mydoc/mips.linux.inter.pdf




2007/9/12, Dajie Tan <jiankemeng@gmail.com>:
> Which exception handler do you want to be nested?
>
> If it's not a interrupt handler you can use STI(enable interrupts) or
> CLI(disable interrupts) after SAVE_ALL for nesting support. They all
> clear EXL bit in CP0_STATUS register and set the KSU=00.
>
>
> 2007/9/12, zhuzhenhua <zzh.hust@gmail.com>:
> > hello, all
> >              i have a mips board,  and the SDRAM speed(bus clock) is not too
> > fast.
> >               so i want change  the SAVE_ALL and RESTORE_ALL to use
> > internal-ram(high speed).
> >              i just wonder whether the SAVE_ALL netsting in kernel  for mips
> > arch?
> >              if not, i think  maybe 1k byte for SAVE_ALL is enough( 32regs
> > X4, and some cp0_regs).
> >              but if  the SAVE_ALL nesting, maybe i need to keep a stack in
> > internal-ram.
> >              thanks for any hints．
> >
> >  Best Regards
> >
> >  --
> >  zzh
> >
> >
>
>
> --
> 为天地立心
> 为生民立命
> 为往圣继绝学
> 为万世开太平
>


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