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Re: [PATCH][MIPS][1/7] AR7: core support

To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Subject: Re: [PATCH][MIPS][1/7] AR7: core support
From: Matteo Croce <technoboy85@gmail.com>
Date: Wed, 12 Sep 2007 00:43:42 +0200
Cc: linux-mips@linux-mips.org, florian@openwrt.org, nbd@openwrt.org, ejka@imfi.kspu.ru, nico@openwrt.org, ralf@linux-mips.org, openwrt-devel@lists.openwrt.org, akpm@linux-foundation.org
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Il Saturday 08 September 2007 19:40:20 Atsushi Nemoto ha scritto:
> > diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
> > index 6379003..75a46ba 100644
> > --- a/arch/mips/kernel/traps.c
> > +++ b/arch/mips/kernel/traps.c
> > @@ -1075,9 +1075,23 @@ void *set_except_vector(int n, void *addr)
> >  
> >     exception_handlers[n] = handler;
> >     if (n == 0 && cpu_has_divec) {
> > +#ifdef CONFIG_AR7
> > +           /* lui k0, 0x0000 */
> > +           *(volatile u32 *)(CAC_BASE+0x200) =
> > +                           0x3c1a0000 | (handler >> 16);
> > +           /* ori k0, 0x0000 */
> > +           *(volatile u32 *)(CAC_BASE+0x204) =
> > +                           0x375a0000 | (handler & 0xffff);
> > +           /* jr k0 */
> > +           *(volatile u32 *)(CAC_BASE+0x208) = 0x03400008;
> > +           /* nop */
> > +           *(volatile u32 *)(CAC_BASE+0x20C) = 0x00000000;
> > +           flush_icache_range(CAC_BASE+0x200, CAC_BASE+0x210);
> > +#else
> >             *(volatile u32 *)(ebase + 0x200) = 0x08000000 |
> >                                              (0x03ffffff & (handler >> 2));
> >             flush_icache_range(ebase + 0x200, ebase + 0x204);
> > +#endif
> >     }
> >     return (void *)old_handler;
> >  }
> 
> Runtime checking, something like this would be better than ifdef:
> 
>       if ((handler ^ (ebase + 4)) & 0xfc000000)
>               /* use jr */
>               ...
>       } else {
>               /* use j */
>               ...
>       }
This will not make the code bigger? What's wrong with #ifdef?

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