| To: | yshi <yang.shi@windriver.com> |
|---|---|
| Subject: | Re: [PATCH] malta4kec hang in calibrate_delay fix |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Tue, 4 Sep 2007 13:44:45 +0100 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <46DD1CD1.5040306@windriver.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <46DD1CD1.5040306@windriver.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.14 (2007-02-12) |
On Tue, Sep 04, 2007 at 04:52:33PM +0800, yshi wrote: > perfmon2 patch changed timer interrupt handler of malta board. > When kernel handles timer interrupt, interrupt handler will read 30 bit > of cause register. If this bit is zero, timer interrupt handler will > exit, won't really handle interrupt. Because Malta 4kec board's core > revision is CoreFPGA-3, this core's cause register doesn't implement 30 > bit, so kernel always read zero from this bit. This will cause kernel > hang in calibrate_delay. You seem to have defined cpu_has_mips_r2 as 1 in your cpu_features_override.h file. Classic cut'n'paste error I'd guess :-) Ralf |
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