| To: | Carl van Schaik <carl@ok-labs.com> |
|---|---|
| Subject: | Re: TLS register for NPTL |
| From: | Thiemo Seufer <ths@networkno.de> |
| Date: | Mon, 20 Aug 2007 09:06:27 +0100 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <46C93BB5.9050809@ok-labs.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <46C93BB5.9050809@ok-labs.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.5.16 (2007-06-11) |
Carl van Schaik wrote: > Hi All, > > It seems the rdhwr emulation is used/proposed for accessing the thread > word in NPTL. > I've been reading some of the posts from 2005 about this choice of this > and what I have missed is anyone talking about using the "k0" register > for TLS. It seems logical that the kernel could always restore k0 on > returning to user-land and having k1 only for the last part of returning > to user is sufficient. Any reason why this was not looked at? The TLB handlers need k0/k1 as well and have no good place to save/restore a register. Thiemo |
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | TLS register for NPTL, Carl van Schaik |
|---|---|
| Next by Date: | Index Store Tag and Fetch&Lock in MIPS32 24KEc, Mohamed Bamakhrama |
| Previous by Thread: | TLS register for NPTL, Carl van Schaik |
| Next by Thread: | Re: TLS register for NPTL, Ralf Baechle |
| Indexes: | [Date] [Thread] [Top] [All Lists] |