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Re: [PATCH -mm 3/4] MIPS: Add BCM947XX to Kconfig (v2)

To: Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH -mm 3/4] MIPS: Add BCM947XX to Kconfig (v2)
From: Michael Buesch <mb@bu3sch.de>
Date: Mon, 6 Aug 2007 22:18:27 +0200
Cc: Felix Fietkau <nbd@openwrt.org>, Andrew Morton <akpm@osdl.org>, linux-mips@linux-mips.org, Waldemar Brodkorb <wbx@openwrt.org>, Florian Schirmer <jolt@tuxbox.org>
In-reply-to: <20070806201650.GA4645@hall.aurel32.net>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20070806150931.GH24308@hall.aurel32.net> <200708062024.53952.mb@bu3sch.de> <20070806201650.GA4645@hall.aurel32.net>
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On Monday 06 August 2007 22:16:50 Aurelien Jarno wrote:
> The patch below against 2.6.23-rc1-mm2 adds a BCM947XX option to 
> Kconfig and modify the SSB Kconfig to select SSB_PCICORE_HOSTMODE by
> default with BCM947XX CPUs.
> 
> Cc: Michael Buesch <mb@bu3sch.de>
> Cc: Waldemar Brodkorb <wbx@openwrt.org>
> Cc: Felix Fietkau <nbd@openwrt.org>
> Cc: Florian Schirmer <jolt@tuxbox.org>
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

Acked-by: Michael Buesch <mb@bu3sch.de>

> 
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -67,6 +67,20 @@
>         note that a kernel built with this option selected will not be
>         able to run on normal units.
>  
> +config BCM947XX
> +     bool "BCM947xx based boards"
> +     select DMA_NONCOHERENT
> +     select HW_HAS_PCI
> +     select IRQ_CPU
> +     select SYS_HAS_CPU_MIPS32_R1
> +     select SYS_SUPPORTS_32BIT_KERNEL
> +     select SYS_SUPPORTS_LITTLE_ENDIAN
> +     select SSB
> +     select SSB_DRIVER_MIPS
> +     select GENERIC_GPIO
> +     help
> +      Support for BCM947xx based boards
> +
>  config MIPS_COBALT
>       bool "Cobalt Server"
>       select DMA_NONCOHERENT
> --- a/drivers/ssb/Kconfig
> +++ b/drivers/ssb/Kconfig
> @@ -67,6 +67,7 @@
>  config SSB_PCICORE_HOSTMODE
>       bool "Hostmode support for SSB PCI core"
>       depends on SSB_DRIVER_PCICORE && SSB_DRIVER_MIPS
> +     default y if BCM947XX
>       help
>         PCIcore hostmode operation (external PCI bus).
>  
> 



-- 
Greetings Michael.

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