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Re: Modpost warning on Alchemy

To: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Subject: Re: Modpost warning on Alchemy
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Thu, 2 Aug 2007 15:33:11 +0100 (BST)
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
In-reply-to: <46B1E716.6070807@ru.mvista.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20070801115231.GA20323@linux-mips.org> <46B07B36.1000501@ru.mvista.com> <Pine.LNX.4.64N.0708011337390.20314@blysk.ds.pg.gda.pl> <46B086EB.2030101@ru.mvista.com> <46B0880B.2000009@ru.mvista.com> <Pine.LNX.4.64N.0708011629010.20314@blysk.ds.pg.gda.pl> <46B0AA74.7040100@ru.mvista.com> <Pine.LNX.4.64N.0708011708250.20314@blysk.ds.pg.gda.pl> <46B0B6B4.5090103@ru.mvista.com> <Pine.LNX.4.64N.0708011737170.20314@blysk.ds.pg.gda.pl> <46B0BD99.6070901@ru.mvista.com> <Pine.LNX.4.64N.0708020945020.22591@blysk.ds.pg.gda.pl> <46B1D2F7.8000002@ru.mvista.com> <Pine.LNX.4.64N.0708021349040.22591@blysk.ds.pg.gda.pl> <46B1E716.6070807@ru.mvista.com>
Sender: linux-mips-bounce@linux-mips.org
On Thu, 2 Aug 2007, Sergei Shtylyov wrote:

>    Yeah, that the format of type 1 cycles.

 Well, that is how it is presented to software on many systems.  The type 
1 cycle format actually differs a little bit, as the two least significant 
bits of the register number are passed to byte enables and when presented 
to the bus they are replaced with a fixed code that denotes the cycle 
type.

>    Unfortunately, Alchemy designers were too lazy to implement a simple
> translation scheme for type 0 cycles. They probably though that with 36-bit
> bus the may not limit themselves... :-)

 Yes, some people seem to think the abundance of resources exempts them 
from properly architecting their designs, sigh...

 On the other hand, the decision to identity-map the PCI config space in 
the physical address space of the processor rather than only making it 
accessible through a pair of an address and a data register was good IMO.

  Maciej

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