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Re: Modpost warning on Alchemy

To: "Maciej W. Rozycki" <macro@linux-mips.org>
Subject: Re: Modpost warning on Alchemy
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
Date: Wed, 1 Aug 2007 16:58:12 +0100
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>, Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
In-reply-to: <Pine.LNX.4.64N.0708011639030.20314@blysk.ds.pg.gda.pl>
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References: <20070801115231.GA20323@linux-mips.org> <46B07B36.1000501@ru.mvista.com> <Pine.LNX.4.64N.0708011337390.20314@blysk.ds.pg.gda.pl> <46B086EB.2030101@ru.mvista.com> <20070801163926.038c48db@the-village.bc.nu> <Pine.LNX.4.64N.0708011639030.20314@blysk.ds.pg.gda.pl>
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> > >     Even on a CPU with 36-bit physical address? ;-)
> > 
> > Nope. This is one problem for example with ioremap on a Pentium Pro.
> 
>  Well, but we only consider MIPS processors here which do not have such 
> odd restrictions resulting from bad design decisions in the past. ;-)  
> The 32-bit TLB entry format allows for up to 36 bits of the physical 
> address space (34 bits if support for the page size of 1kB has been 

So does the Pentium Pro. We can map 36bit physical addresses.

> enabled).  For anything beyond that you need a 64-bit MIPS processor using 
> the 64-bit TLB entry format.

Your problem is a little higher up the stack. ioremap takes an unsigned
long, which on a 32bit system usually means you can't give it a 36bit bus
address to remap.

Alan

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