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Re: [PATCH] 16K page size in 32 bit kernel

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH] 16K page size in 32 bit kernel
From: Songmao Tian <tiansm@lemote.com>
Date: Wed, 01 Aug 2007 08:47:41 +0800
Cc: Dajie Tan <jiankemeng@gmail.com>, linux-mips <linux-mips@linux-mips.org>
In-reply-to: <20070731204532.GA22036@linux-mips.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20070731130950.GA5540@sw-linux.com> <20070731100027.GA3983@linux-mips.org> <46AF3DEE.2080603@lemote.com> <20070731204532.GA22036@linux-mips.org>
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Ralf Baechle wrote:
On Tue, Jul 31, 2007 at 09:49:34PM +0800, Songmao Tian wrote:

I think the following is more complete?

#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PGDIR_SHIFT    21
+#define PGDIR_SHIFT    (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
#else
-#define PGDIR_SHIFT    22
+#define PGDIR_SHIFT    (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 2))
#endif

Better suggestion :-)

  Ralf

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 2fbd47e..ff29485 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -43,11 +43,7 @@ extern int add_temporary_entry(unsigned long entrylo0, 
unsigned long entrylo1,
  */
/* PGDIR_SHIFT determines what a third-level page table entry can map */
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PGDIR_SHIFT    21
-#else
-#define PGDIR_SHIFT    22
-#endif
+#define PGDIR_SHIFT    (2 * PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2)
 #define PGDIR_SIZE     (1UL << PGDIR_SHIFT)
 #define PGDIR_MASK     (~(PGDIR_SIZE-1))


Sure:)

Tian

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