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Re: [PATCH] 16K page size in 32 bit kernel

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Subject: Re: [PATCH] 16K page size in 32 bit kernel
From: Songmao Tian <tiansm@lemote.com>
Date: Tue, 31 Jul 2007 17:37:29 +0800
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips <linux-mips@linux-mips.org>
In-reply-to: <20070731130950.GA5540@sw-linux.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20070731130950.GA5540@sw-linux.com>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Icedove 1.5.0.8 (X11/20061116)
Thanks Dajie:)

With 22 PGDIR_SHIFT, 15 extra page tables is populated when a whole 64M address space is accessed, the patch can save memory quite a bit:)

Dajie Tan wrote:
32-bit Kernel for loongson2e currently use 16KB page size to avoid
cache alias problem.So, the definiton of PGDIR_SHIFT muse be 12+14.

Using 22 in 16K page size do not lead to a serious problem but the number
of pages allocated for page table is more than previous. (cat
/proc/vmstat | grep nr_page_table_pages)

It's been tested on FuLong mini PC(loongson2e inside).


Signed-off-by: Dajie Tan <jiankemeng@gmail.com>
---
 include/asm-mips/pgtable-32.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 2fbd47e..8d34ebf 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -46,7 +46,7 @@ extern int add_temporary_entry(unsigned long entrylo0, 
unsigned long entrylo1,
 #ifdef CONFIG_64BIT_PHYS_ADDR
 #define PGDIR_SHIFT    21
 #else
-#define PGDIR_SHIFT    22
+#define PGDIR_SHIFT    (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 2))
 #endif
 #define PGDIR_SIZE     (1UL << PGDIR_SHIFT)
 #define PGDIR_MASK     (~(PGDIR_SIZE-1))






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