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Re: [PATCH] Fix known HW bug with MIPS core on NXP/Philips PNX8550

To: Daniel Laird <daniel.j.laird@nxp.com>
Subject: Re: [PATCH] Fix known HW bug with MIPS core on NXP/Philips PNX8550
From: Jan-Benedict Glaw <jbglaw@lug-owl.de>
Date: Thu, 19 Jul 2007 17:28:40 +0200
Cc: linux-mips@linux-mips.org
In-reply-to: <469F822D.9040209@nxp.com>
Mail-followup-to: Daniel Laird <daniel.j.laird@nxp.com>, linux-mips@linux-mips.org
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <469F822D.9040209@nxp.com>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.13 (2006-08-11)
On Thu, 2007-07-19 16:24:29 +0100, Daniel Laird <daniel.j.laird@nxp.com> wrote:
> Update Patch
> 
> Fix known bug with MIPS core when using TLB on NXP/Philips PNX8550

Both versions are whitespace damaged...

> Index: linux-2.6.22.1/arch/mips/mm/tlb-r4k.c
> ===================================================================
> --- linux-2.6.22.1/arch/mips/mm/tlb-r4k.c    (revision 8)
> +++ linux-2.6.22.1/arch/mips/mm/tlb-r4k.c    (working copy)
> @@ -456,7 +456,11 @@
>      */
>     probe_tlb(config);
>     write_c0_pagemask(PM_DEFAULT_MASK);
> +#ifdef CONFIG_SOC_PNX8550
> +    write_c0_wired(11);
> +#else
>     write_c0_wired(0);
> +#endif
>     write_c0_framemask(0);
>     temp_tlb_entry = current_cpu_data.tlbsize - 1;

Magic constants?

MfG, JBG

-- 
      Jan-Benedict Glaw      jbglaw@lug-owl.de              +49-172-7608481
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