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[PATCH] Fix timer/performance interrupt detection

To: linux-mips@linux-mips.org
Subject: [PATCH] Fix timer/performance interrupt detection
From: chris@mips.com
Date: Thu, 21 Jun 2007 12:59:57 +0100
Cc: Chris Dearman <chris@mips.com>
In-reply-to: <11824271984112-git-send-email-chris@mips.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <11824271984112-git-send-email-chris@mips.com>
Sender: linux-mips-bounce@linux-mips.org
From: Chris Dearman <chris@mips.com>

Signed-off-by: Chris Dearman <chris@mips.com>
---
 arch/mips/kernel/traps.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index b123364..3ea7863 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1372,12 +1372,12 @@ void __init per_cpu_trap_init(void)
         */
        if (cpu_has_mips_r2) {
                cp0_compare_irq = (read_c0_intctl () >> 29) & 7;
-               cp0_perfcount_irq = -1;
-       } else {
-               cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
                cp0_perfcount_irq = (read_c0_intctl () >> 26) & 7;
-               if (cp0_perfcount_irq != cp0_compare_irq)
+               if (cp0_perfcount_irq == cp0_compare_irq)
                        cp0_perfcount_irq = -1;
+       } else {
+               cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
+               cp0_perfcount_irq = -1;
        }
 
 #ifdef CONFIG_MIPS_MT_SMTC
-- 
1.4.4.3


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