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Re: Tickless/dyntick kernel, highres timer and general time crapectomy

To: "Ralf Baechle" <ralf@linux-mips.org>
Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy
From: "Franck Bui-Huu" <vagabon.xyz@gmail.com>
Date: Fri, 8 Jun 2007 10:29:42 +0200
Cc: "Sergei Shtylyov" <sshtylyov@ru.mvista.com>, linux-mips@linux-mips.org
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Hi Ralf,

Ralf Baechle wrote:
On Thu, Jun 07, 2007 at 04:44:11PM +0200, Franck Bui-Huu wrote:

  No, it doesn't. Even on dyntick kernels, interrupts do happen several
times a second. Dynticks have nothing to do with disabling timer
interrupts...

That's true however if your system has 2 clock devices. One is the r4k-hpt
and the other one soemthing else with a higher rating. If you don't stop
r4k-hpt interrupts, how does it work ?

To some degree this question is hypothetic because generally the cp0
count/compare timer will be the highest rated counter.


Well it increments every other clock. So it's not impossible to have a
an other higher rated counter.

But even if so, the basic solution is the same - just ignore the interrupt
whenever it happens to be triggered.  Or if it isn't shared with an
active performance counter interrupt, you could even disable_irq() it.


OK, but the current code doesn't seem to support very well multiple
clock event devices. For example the global_cd array is not updated if
a new clock event device is registered. Even ll_timer_interrupt()
handler should be renamed something like ll_hpt_interrupt() for
example.

Thanks,


--
              Franck

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