| To: | Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
|---|---|
| Subject: | Re: [PATCH] Register PCI host bridge resource earlier |
| From: | Sergei Shtylyov <sshtylyov@ru.mvista.com> |
| Date: | Sun, 08 Apr 2007 16:20:00 +0400 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <20070408112844.GA7553@alpha.franken.de> |
| Organization: | MontaVista Software Inc. |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20070408112844.GA7553@alpha.franken.de> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 |
Hello. Thomas Bogendoerfer wrote: PCI based SNI RM machines have their EISA bus behind an Intel PCI/EISA bridge. So the PCI IO range must start at 0x0000. Changing that will break the PCI bus, because i8259.c already has registered it's IO addresses before the PCI bus gets initialized. Below is a patch, which will register the PCI host bridge resources inside register_pci_controller(). It also changes i8259.c to use insert_region(), because request_resource() will fail, if the IO space of the PIT hanging of the PCI host bridge (maybe passing the resource parent to init_i8259_irqs() is a cleaner fix for that). First, I don't understand how PIT and PIC resources may intersect. Then, IIUC, using inert_resource() will cause PIT resource be the child of the PIC resource which doesn't make sense either. WBR, Sergei |
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