|Subject:||Re: Au1500 and TI PCI1510 cardbus|
|From:||Michael Stickel <email@example.com>|
|Date:||Sat, 17 Mar 2007 14:45:21 +0100|
|References:||<firstname.lastname@example.org> <45FBB9C7.email@example.com> <firstname.lastname@example.org>|
|User-agent:||Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.2.1) Gecko/20030225|
Marco Braga wrote:
I've found the datasheet of PCI1510 and the section you pointed. Sadly I don't understand fully the problem, so I'll discuss it with out hardware enginers. Do you have any reference to the effects of that problem? Can it cause the hand of reads on the bus?
I am sory, I meant the datasheet of the Au1500. I do not find the paragraph anymore, but can tell you more on monday. One interesting paragraph is "AMD Alchemy Au1500 Processor Data Book" - 4.3.10 "Other Notes" first paragraph.
The note I meant descibes a situration where a delayed read transaction on a pci device behind a pci-pci bridge can cause to a racing condition, where the whole system stalls. The CPU does not get the chance to do anything anymore, because the PCI subsystem blocks it.
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