| To: | Thiemo Seufer <ths@networkno.de> |
|---|---|
| Subject: | Re: [PATCH 2/5] mips: PMC MSP71xx mips common |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Wed, 28 Feb 2007 19:32:16 +0000 |
| Cc: | Marc St-Jean <Marc_St-Jean@pmc-sierra.com>, Andrew Sharp <tigerand@gmail.com>, linux-mips@linux-mips.org |
| In-reply-to: | <20070227173841.GD12230@networkno.de> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <45E465C1.50408@pmc-sierra.com> <20070227173841.GD12230@networkno.de> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.4.2.2i |
On Tue, Feb 27, 2007 at 05:38:41PM +0000, Thiemo Seufer wrote: > Something like > > #if LOADADDR == 0xffffffff80000000 > .fill 0x400 > #endif > > but by defining an appropriate name in arch/mips/Makefile instead of > externalizing the load-y/LOADADDR there. Basically a good idea but it will fail for 64-bit kernels so the test would need to be extended to cover XKPHYS as well. Also R2 processors which have the c0_ebase registers do no need to reserve space for exception handlers as they can easily move them elsewhere. Ralf |
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