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Re: [PATCH] [MIPS] Fixed PCI resource fixup

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH] [MIPS] Fixed PCI resource fixup
From: Peter Horton <phorton@bitbox.co.uk>
Date: Fri, 12 Jan 2007 14:16:39 +0000
Cc: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>, linux-mips <linux-mips@linux-mips.org>
In-reply-to: <20070111143116.GA4451@linux-mips.org>
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Ralf Baechle wrote:
On Thu, Jan 11, 2007 at 02:55:58PM +0900, Yoichi Yuasa wrote:

This patch has fixed IDE resources problem about Cobalt.

pcibios_fixup_device_resources() changes non-movable resources.
It cannot be changed if there is IORESOURCE_PCI_FIXED in the resource flags.

<Ralf> anemo: Have you seen Yoichi's patch?
<anemo> Ralf: yes, but I could not see why ...  My impression is 
IORESOURCE_PCI_FIXED and io_offset adjustment is irrerevant.
<Ralf> This whole fixup thing is really meant to handle machines where there is 
an offset between PCI bus addresses and CPU physical addresses.
<Ralf> And that exists regardless of IORESOURCE_PCI_FIXED
<anemo> I thought so too.  So I can not see why youichi's patch fix something.
<Ralf> This may be the explanation:
<Ralf> static struct pci_controller cobalt_pci_controller = {
<Ralf>         .pci_ops        = &gt64111_pci_ops,
<Ralf>         .mem_resource   = &cobalt_mem_resource,
<Ralf>         .mem_offset     = 0,
<Ralf>         .io_resource    = &cobalt_io_resource,
<Ralf>         .io_offset      = 0 - GT_DEF_PCI0_IO_BASE,
<Ralf> };
<Ralf> I think he should have io_offset = 0.

Which is what other GT-64120 platforms are using, so I wonder why that is
different on Cobalt.


The GT-64111 passes the CPU addresses straight onto the PCI bus and does not remove the offset of the Galileo's PCI window in CPU space. This means the only PCI I/O addresses that can be supported are 0x1000.0000 to 0x11ff.ffff, hence the negative 'io_offset'.

I assume the GT-64120 remaps the PCI addresses somehow to remove the offset.

P.

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