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Re: [PATCH] Define MIPS_CPU_IRQ_BASE in generic header

To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Subject: Re: [PATCH] Define MIPS_CPU_IRQ_BASE in generic header
From: Ralf Baechle <ralf@linux-mips.org>
Date: Mon, 8 Jan 2007 15:11:11 +0000
Cc: linux-mips@linux-mips.org
In-reply-to: <20070108.021429.78706014.anemo@mba.ocn.ne.jp>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20070108.021429.78706014.anemo@mba.ocn.ne.jp>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.4.2.2i
On Mon, Jan 08, 2007 at 02:14:29AM +0900, Atsushi Nemoto wrote:

> The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
> platforms and are same value on most platforms (0 or 16, depends on
> CONFIG_I8259).  Define them in asm-mips/mach-generic/irq.h and make
> them customizable.  This will save a few cycle on each CPU interrupt.
> 
> A good side effect is removing some dependencies to MALTA in generic
> SMTC code.
> 
> Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
> mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
> them might cause some header dependency problem and there seems no
> good reason to customize it.  So currently only VR41XX is using custom
> MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.
> 
> Testing this patch on those platforms is greatly appreciated.  Thank
> you.

Queued for 2.6.21,

  Ralf

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