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Re: [PATCH] pnx8550: fix system timer support

To: Vitaly Wool <vitalywool@gmail.com>
Subject: Re: [PATCH] pnx8550: fix system timer support
From: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Date: Thu, 21 Dec 2006 18:35:12 +0300
Cc: ralf@linux-mips.org, linux-mips@linux-mips.org
In-reply-to: <20061221173439.fc76c832.vitalywool@gmail.com>
Organization: MontaVista Software Inc.
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20061221173439.fc76c832.vitalywool@gmail.com>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803
Hello.

Vitaly Wool wrote:

the patch inlined below restores proper time accounting for PNX8550-based 
boards. It also gets rid of #ifdef in the generic code which becomes 
unnecessary then.

Signed-off-by: Vitaly Wool <vwool@ru.mvista.com>

diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 11aab6d..5fe3eb8 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -94,10 +94,8 @@ static void c0_timer_ack(void)
 {
        unsigned int count;
-#ifndef CONFIG_SOC_PNX8550 /* pnx8550 resets to zero */
        /* Ack this timer interrupt and set the next one.  */
        expirelo += cycles_per_jiffy;
-#endif
        write_c0_compare(expirelo);
/* Check to see if we have missed any timer interrupts. */
diff --git a/arch/mips/philips/pnx8550/common/time.c 
b/arch/mips/philips/pnx8550/common/time.c
index 65c440e..25a8df7 100644
--- a/arch/mips/philips/pnx8550/common/time.c
+++ b/arch/mips/philips/pnx8550/common/time.c
@@ -29,12 +29,27 @@
 #include <asm/hardirq.h>
 #include <asm/div64.h>
 #include <asm/debug.h>
+#include <asm/time.h>
#include <int.h>
 #include <cm.h>

 extern unsigned int mips_hpt_frequency;

   This is already declared in <asm/time.h>...

+static unsigned long cpj;
+
+static cycle_t hpt_read(void)
+{
+       return read_c0_count2();
+}
+
+static void timer_ack(void)
+{
+       write_c0_compare(cpj);
+}
+
+extern struct clocksource clocksource_mips;

   And this too...

@@ -68,22 +83,41 @@ void pnx8550_time_init(void)
         * HZ timer interrupts per second.
         */
        mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p));
+       cpj = (mips_hpt_frequency + HZ / 2) / HZ;
+       timer_ack();

   Probably makes sense to clear Count2 as well...

 void __init plat_timer_setup(struct irqaction *irq)
 {
        int configPR;
setup_irq(PNX8550_INT_TIMER1, irq);
+       setup_irq(PNX8550_INT_TIMER2, &monotonic_irqaction);
/* Start timer1 */
        configPR = read_c0_config7();
        configPR &= ~0x00000008;
        write_c0_config7(configPR);
- /* Timer 2 stop */
+       /* Timer 2 start */
        configPR = read_c0_config7();
-       configPR |= 0x00000010;
+       configPR &= ~0x00000010;
        write_c0_config7(configPR);

   I'd have coalesced that into one RMW but well...

        write_c0_count2(0);

WBR, Sergei

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