On Tue, 19 Dec 2006 07:34:54 -0800 (PST), Daniel Laird
> I am just digging out the mips core user manual...
> However I have tried this change you suggested, it still takes a long time
> to get past the calibrate delay function (~10seconds).
> However after this it seems to run at full speed where as before it used to
> run very slow.
> So an improvement, I think this does mean the new time.c has broken 8550
> support hopefully I can find otu what the core does so it can be fixed.
Hm, then it seems writing to COMPARE does not clear COUNT.
How about this? You should still fix pnx8550_hpt_read() anyway, but I
suppose gettimeofday() on PNX8550 was broken long time.
Subject: [MIPS] Use custom timer_ack and clocksource_mips.read for PNX8550
Signed-off-by: Atsushi Nemoto <email@example.com>
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 11aab6d..8aa544f 100644
@@ -94,10 +94,8 @@ static void c0_timer_ack(void)
unsigned int count;
-#ifndef CONFIG_SOC_PNX8550 /* pnx8550 resets to zero */
/* Ack this timer interrupt and set the next one. */
expirelo += cycles_per_jiffy;
/* Check to see if we have missed any timer interrupts. */
diff --git a/arch/mips/philips/pnx8550/common/time.c
index 65c440e..e86905a 100644
@@ -33,7 +33,18 @@ #include <asm/debug.h>
-extern unsigned int mips_hpt_frequency;
+static unsigned long cycles_per_jiffy __read_mostly;
+static void pnx8550_timer_ack(void)
+static cycle_t pnx8550_hpt_read(void)
+ /* FIXME: we should use timer2 or timer3 as freerun counter */
+ return read_c0_count();
* pnx8550_time_init() - it does the following things:
@@ -68,6 +79,11 @@ void pnx8550_time_init(void)
* HZ timer interrupts per second.
mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p));
+ cycles_per_jiffy = (mips_hpt_frequency + HZ / 2) / HZ;
+ clocksource_mips.read = pnx8550_hpt_read;
+ mips_timer_ack = pnx8550_timer_ack;
void __init plat_timer_setup(struct irqaction *irq)