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Re: [PATCH] use generic_handle_irq, handle_level_irq, handle_percpu_irq

To: linux-mips@linux-mips.org
Subject: Re: [PATCH] use generic_handle_irq, handle_level_irq, handle_percpu_irq
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Sat, 02 Dec 2006 00:08:03 +0900 (JST)
Cc: ralf@linux-mips.org
In-reply-to: <20061114.011318.99611303.anemo@mba.ocn.ne.jp>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20061114.011318.99611303.anemo@mba.ocn.ne.jp>
Sender: linux-mips-bounce@linux-mips.org
On Tue, 14 Nov 2006 01:13:18 +0900 (JST), Atsushi Nemoto <anemo@mba.ocn.ne.jp> 
wrote:
> Further incorporation of generic irq framework.  Replacing __do_IRQ()
> by proper flow handler would make the irq handling path a bit simpler
> and faster.
> 
> * use generic_handle_irq() instead of __do_IRQ().
> * use handle_level_irq for obvious level-type irq chips.
> * use handle_percpu_irq for irqs marked as IRQ_PER_CPU.
> * setup .eoi routine for irq chips possibly used with handle_percpu_irq.
> 
> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
> 
>  arch/mips/dec/ioasic-irq.c                               |    6 ++++--

Does somebody tried this patch on decstation?  I'm afraid this patch
broke it.  While ioasic_dma_irq_type's .end routine
end_ioasic_dma_irq() is doing something special, it should not be
handled correctly by handle_level_irq.  Here is a patch revert that
part.


Subject: do not use handle_level_irq for ioasic_dma_irq_type.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>

diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c
index 269b22b..e21476d 100644
--- a/arch/mips/dec/ioasic-irq.c
+++ b/arch/mips/dec/ioasic-irq.c
@@ -106,8 +106,7 @@ void __init init_ioasic_irqs(int base)
                set_irq_chip_and_handler(i, &ioasic_irq_type,
                                         handle_level_irq);
        for (; i < base + IO_IRQ_LINES; i++)
-               set_irq_chip_and_handler(i, &ioasic_dma_irq_type,
-                                        handle_level_irq);
+               set_irq_chip(i, &ioasic_dma_irq_type);
 
        ioasic_irq_base = base;
 }

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