linux-mips
[Top] [All Lists]

Re: [PATCH] use generic_handle_irq, handle_level_irq, handle_percpu_irq

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH] use generic_handle_irq, handle_level_irq, handle_percpu_irq
From: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Date: Thu, 23 Nov 2006 18:42:38 +0300
Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp>, linux-mips@linux-mips.org
In-reply-to: <20061122120552.GA27782@linux-mips.org>
Organization: MontaVista Software Inc.
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20061114.011318.99611303.anemo@mba.ocn.ne.jp> <45631BD2.4090509@ru.mvista.com> <20061122120552.GA27782@linux-mips.org>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803
Hello.

Ralf Baechle wrote:

@@ -104,6 +105,7 @@ static struct irq_chip mips_mt_cpu_irq_c
        .mask           = mask_mips_mt_irq,
        .mask_ack       = mips_mt_cpu_irq_ack,
        .unmask         = unmask_mips_mt_irq,
+       .eoi            = unmask_mips_mt_irq,
        .end            = mips_mt_cpu_irq_end,
};

@@ -124,7 +126,8 @@ void __init mips_cpu_irq_init(int irq_ba
                        set_irq_chip(i, &mips_mt_cpu_irq_controller);

        for (i = irq_base + 2; i < irq_base + 8; i++)
-               set_irq_chip(i, &mips_cpu_irq_controller);
+               set_irq_chip_and_handler(i, &mips_cpu_irq_controller,
+                                        handle_level_irq);

  BTW, isn't IRQ7 per-CPU?

Yes and no.  On many CPUs IRQ 7 can be configured at reset time as either
the count / compare interrupt or a CPU interrupt just like the others.
It always used to be a normal CPU interrupt for R2000 class CPUs.

Nevertheless, IRQ7 having percpu flow when it's known to be from count/compare would make the timer stuff faster, I assume...

  Ralf

WBR, Sergei

<Prev in Thread] Current Thread [Next in Thread>