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Re: Sync operation in atomic_add_return()

To: "Gideon Stupp (gstupp)" <gstupp@cisco.com>
Subject: Re: Sync operation in atomic_add_return()
From: Ralf Baechle <ralf@linux-mips.org>
Date: Fri, 10 Nov 2006 13:37:19 +0000
Cc: linux-mips@linux-mips.org
In-reply-to: <E98CBCB9ACC07244969BE4541EC0A78303137105@xmb-ams-33b.emea.cisco.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <E98CBCB9ACC07244969BE4541EC0A78303137105@xmb-ams-33b.emea.cisco.com>
Sender: linux-mips-bounce@linux-mips.org
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On Mon, Nov 06, 2006 at 03:42:32PM +0100, Gideon Stupp (gstupp) wrote:

> I am trying to figure out why there is a sync operation in
> linux/include/asm-mips/atomic.h:atomic_add_return(). 
> I believe it was added in the linux-2.4.19 patch, but can't trace the
> reason. Can anyone help?

MIPS is a weakly ordered architecture.  In theory.  So those syncs are
required to ensure proper global ordering.  In practice only the Sibyte
SB1 and RM9000 CMPs are documented to be weakly ordered but I've never
actually observed a single reordering related bug on any MIPS
multiprocessor which may either mean no reordering happens in practice
or I'm a genious managed to fix all reordering related bugs before they
could strike.  I tend to assume the latter ;-)  On a uniprocessor these
syncs are definately not needed and I have a patch to remove the sync
for uniprocessor kernels and known to be strongly ordered SMPs waiting
for 2.6.20.

  Ralf

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