| To: | m_lachwani@yahoo.com |
|---|---|
| Subject: | Re: Extreme system overhead on large IP27 |
| From: | Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
| Date: | Thu, 26 Oct 2006 23:16:42 +0900 (JST) |
| Cc: | creideiki+linux-mips@ferretporn.se, ralf@linux-mips.org, linux-mips@linux-mips.org |
| In-reply-to: | <20061026074216.68000.qmail@web37504.mail.mud.yahoo.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20061026.130552.11963152.nemoto@toshiba-tops.co.jp> <20061026074216.68000.qmail@web37504.mail.mud.yahoo.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Thu, 26 Oct 2006 00:42:16 -0700 (PDT), Manish Lachwani <m_lachwani@yahoo.com> wrote: > It could be that I am seeing a similar issue on the > SWARM board (sb1250) as well. Your patch removed the > shifts for mip_hpt_frequency from > arch/mips/sibyte/sb1250/time.c and in the > sb1250_hpt_read(). The Sibyte HPT is 1 Mhz. However, > when I added those shifts back, I did not see any > issues with the system clock. I could possibly try out > your patch with lower clocksource shift values and see > if the system clock is still wrong. I just sent the patch. Please try it. > Btw, the clocksource changes seem to work well on the > BCM 1480 based board. Thanks, good news! As Ralf pointed out, current code still problematic on some SMP system, but I think IP27, SB1250, BCM1480 should be OK now while their mips_hpt_read are not using per-CPU cp0 timers. --- Atsushi Nemoto |
| Previous by Date: | [PATCH] fix clocksource parameter for low frequency timer., Atsushi Nemoto |
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